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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-09-28 11:40:44 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-09-28 11:40:44 +0000
commit5d80af2a1bda2db0ed1812cee0d5096d78832029 (patch)
tree0c32e3057e592621647b8b338b7aededb42e23b0 /os/hal
parent52c1339d2333672a1824f1dc7ee8174cf5876ba4 (diff)
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New STM32F37x headers.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7331 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/boards/ST_STM32373C_EVAL/board.h2
-rw-r--r--os/hal/ports/STM32/STM32F30x/hal_lld.h16
-rw-r--r--os/hal/ports/STM32/STM32F37x/ext_lld_isr.c14
-rw-r--r--os/hal/ports/STM32/STM32F37x/hal_lld.h18
-rw-r--r--os/hal/ports/STM32/STM32F37x/stm32_rcc.h6
-rw-r--r--os/hal/ports/STM32/STM32F37x/stm32_registry.h190
6 files changed, 223 insertions, 23 deletions
diff --git a/os/hal/boards/ST_STM32373C_EVAL/board.h b/os/hal/boards/ST_STM32373C_EVAL/board.h
index 95c345e43..863242331 100644
--- a/os/hal/boards/ST_STM32373C_EVAL/board.h
+++ b/os/hal/boards/ST_STM32373C_EVAL/board.h
@@ -43,7 +43,7 @@
/*
* MCU type as defined in the ST header.
*/
-#define STM32F37X
+#define STM32F373xC
/*
* IO pins assignments.
diff --git a/os/hal/ports/STM32/STM32F30x/hal_lld.h b/os/hal/ports/STM32/STM32F30x/hal_lld.h
index 2f9495999..4a678b685 100644
--- a/os/hal/ports/STM32/STM32F30x/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F30x/hal_lld.h
@@ -57,28 +57,28 @@
#if defined(STM32F301x8) || defined(__DOXYGEN__)
#define PLATFORM_NAME "STM32F301x8 Analog & DSP"
-#elif defined(STM32F302x8) || defined(__DOXYGEN__)
+#elif defined(STM32F302x8)
#define PLATFORM_NAME "STM32F302x8 Analog & DSP"
-#elif defined(STM32F302xC) || defined(__DOXYGEN__)
+#elif defined(STM32F302xC)
#define PLATFORM_NAME "STM32F302xC Analog & DSP"
-#elif defined(STM32F303x8) || defined(__DOXYGEN__)
+#elif defined(STM32F303x8)
#define PLATFORM_NAME "STM32F303x8 Analog & DSP"
-#elif defined(STM32F303xC) || defined(__DOXYGEN__)
+#elif defined(STM32F303xC)
#define PLATFORM_NAME "STM32F303xC Analog & DSP"
-#elif defined(STM32F318xx) || defined(__DOXYGEN__)
+#elif defined(STM32F318xx)
#define PLATFORM_NAME "STM32F318xx Analog & DSP"
-#elif defined(STM32F328xx) || defined(__DOXYGEN__)
+#elif defined(STM32F328xx)
#define PLATFORM_NAME "STM32F328xx Analog & DSP"
-#elif defined(STM32F334x8) || defined(__DOXYGEN__)
+#elif defined(STM32F334x8)
#define PLATFORM_NAME "STM32F334x8 Analog & DSP"
-#elif defined(STM32F358xx) || defined(__DOXYGEN__)
+#elif defined(STM32F358xx)
#define PLATFORM_NAME "STM32F358xx Analog & DSP"
#else
diff --git a/os/hal/ports/STM32/STM32F37x/ext_lld_isr.c b/os/hal/ports/STM32/STM32F37x/ext_lld_isr.c
index c98ad04f3..08510e576 100644
--- a/os/hal/ports/STM32/STM32F37x/ext_lld_isr.c
+++ b/os/hal/ports/STM32/STM32F37x/ext_lld_isr.c
@@ -226,7 +226,7 @@ OSAL_IRQ_HANDLER(VectorE4) {
}
#endif
-#if !defined(STM32_DISABLE_EXTI18_HANDLER)
+#if STM32_HAS_USB && !defined(STM32_DISABLE_EXTI18_HANDLER)
/**
* @brief EXTI[18] interrupt handler (USB Wakeup).
*
@@ -312,15 +312,17 @@ void ext_lld_exti_irq_enable(void) {
nvicEnableVector(EXTI0_IRQn, STM32_EXT_EXTI0_IRQ_PRIORITY);
nvicEnableVector(EXTI1_IRQn, STM32_EXT_EXTI1_IRQ_PRIORITY);
- nvicEnableVector(EXTI2_TS_IRQn, STM32_EXT_EXTI2_IRQ_PRIORITY);
+ nvicEnableVector(EXTI2_TSC_IRQn, STM32_EXT_EXTI2_IRQ_PRIORITY);
nvicEnableVector(EXTI3_IRQn, STM32_EXT_EXTI3_IRQ_PRIORITY);
nvicEnableVector(EXTI4_IRQn, STM32_EXT_EXTI4_IRQ_PRIORITY);
nvicEnableVector(EXTI9_5_IRQn, STM32_EXT_EXTI5_9_IRQ_PRIORITY);
nvicEnableVector(EXTI15_10_IRQn, STM32_EXT_EXTI10_15_IRQ_PRIORITY);
nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);
nvicEnableVector(RTC_Alarm_IRQn, STM32_EXT_EXTI17_IRQ_PRIORITY);
+#if STM32_HAS_USB
nvicEnableVector(USBWakeUp_IRQn, STM32_EXT_EXTI18_IRQ_PRIORITY);
- nvicEnableVector(TAMPER_STAMP_IRQn, STM32_EXT_EXTI19_IRQ_PRIORITY);
+#endif
+ nvicEnableVector(TAMP_STAMP_IRQn, STM32_EXT_EXTI19_IRQ_PRIORITY);
nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);
nvicEnableVector(COMP_IRQn, STM32_EXT_EXTI21_22_IRQ_PRIORITY);
}
@@ -334,15 +336,17 @@ void ext_lld_exti_irq_disable(void) {
nvicDisableVector(EXTI0_IRQn);
nvicDisableVector(EXTI1_IRQn);
- nvicDisableVector(EXTI2_TS_IRQn);
+ nvicDisableVector(EXTI2_TSC_IRQn);
nvicDisableVector(EXTI3_IRQn);
nvicDisableVector(EXTI4_IRQn);
nvicDisableVector(EXTI9_5_IRQn);
nvicDisableVector(EXTI15_10_IRQn);
nvicDisableVector(PVD_IRQn);
nvicDisableVector(RTC_Alarm_IRQn);
+#if STM32_HAS_USB
nvicDisableVector(USBWakeUp_IRQn);
- nvicDisableVector(TAMPER_STAMP_IRQn);
+#endif
+ nvicDisableVector(TAMP_STAMP_IRQn);
nvicDisableVector(RTC_WKUP_IRQn);
nvicDisableVector(COMP_IRQn);
}
diff --git a/os/hal/ports/STM32/STM32F37x/hal_lld.h b/os/hal/ports/STM32/STM32F37x/hal_lld.h
index f153f6ea8..6455e6f3d 100644
--- a/os/hal/ports/STM32/STM32F37x/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F37x/hal_lld.h
@@ -26,7 +26,8 @@
* - STM32_HSE_BYPASS (optionally).
* .
* One of the following macros must also be defined:
- * - STM32F37X for Analog & DSP devices.
+ * - STM32F373xC for Analog & DSP devices.
+ * - STM32F378xx for Analog & DSP devices.
* .
*
* @addtogroup HAL
@@ -36,17 +37,23 @@
#ifndef _HAL_LLD_H_
#define _HAL_LLD_H_
-#include "stm32_registry.h"
-
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
- * @name Platform identification
+ * @name Platform identification macros
* @{
*/
-#define PLATFORM_NAME "STM32F37x Analog & DSP"
+#if defined(STM32F373xC) || defined(__DOXYGEN__)
+#define PLATFORM_NAME "STM32F373xC Analog & DSP"
+
+#elif defined(STM32F378xx)
+#define PLATFORM_NAME "STM32F378xx Analog & DSP"
+
+#else
+#error "STM32F7x device not specified"
+#endif
/**
* @brief Sub-family identifier.
@@ -976,6 +983,7 @@
/* Various helpers.*/
#include "nvic.h"
+#include "stm32_registry.h"
#include "stm32_isr.h"
#include "stm32_dma.h"
#include "stm32_rcc.h"
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_rcc.h b/os/hal/ports/STM32/STM32F37x/stm32_rcc.h
index bcd0c93e1..85c5e602b 100644
--- a/os/hal/ports/STM32/STM32F37x/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32F37x/stm32_rcc.h
@@ -202,7 +202,7 @@
*
* @api
*/
-#define rccEnableCAN1(lp) rccEnableAPB1(RCC_APB1ENR_CAN1EN, lp)
+#define rccEnableCAN1(lp) rccEnableAPB1(RCC_APB1ENR_CANEN, lp)
/**
* @brief Disables the CAN1 peripheral clock.
@@ -212,14 +212,14 @@
*
* @api
*/
-#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp)
+#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CANEN, lp)
/**
* @brief Resets the CAN1 peripheral.
*
* @api
*/
-#define rccResetCAN1() rccResetAPB1(RCC_APB1RSTR_CAN1RST)
+#define rccResetCAN1() rccResetAPB1(RCC_APB1RSTR_CANRST)
/** @} */
/**
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_registry.h b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
index 350223f45..08c940a39 100644
--- a/os/hal/ports/STM32/STM32F37x/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
@@ -33,6 +33,10 @@
* @name STM32F37x capabilities
* @{
*/
+/*===========================================================================*/
+/* STM32F373xC. */
+/*===========================================================================*/
+#if defined(STM32F373xC) || defined(__DOXYGEN__)
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
#define STM32_HAS_ADC2 FALSE
@@ -73,6 +77,12 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
+ RCC_AHBENR_GPIOBEN | \
+ RCC_AHBENR_GPIOCEN | \
+ RCC_AHBENR_GPIODEN | \
+ RCC_AHBENR_GPIOEEN | \
+ RCC_AHBENR_GPIOFEN)
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -89,7 +99,7 @@
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 1
+#define STM32_RTC_NUM_ALARMS 2
#define STM32_RTC_HAS_INTERRUPTS FALSE
/* SDIO attributes.*/
@@ -198,6 +208,184 @@
#define STM32_HAS_USB TRUE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
+#endif /* defined(STM32F373xC) */
+
+/*===========================================================================*/
+/* STM32F378xx. */
+/*===========================================================================*/
+#if defined(STM32F378xx) || defined(__DOXYGEN__)
+/* ADC attributes.*/
+#define STM32_HAS_ADC1 TRUE
+#define STM32_HAS_ADC2 FALSE
+#define STM32_HAS_ADC3 FALSE
+#define STM32_HAS_ADC4 FALSE
+
+#define STM32_HAS_SDADC1 TRUE
+#define STM32_HAS_SDADC2 TRUE
+#define STM32_HAS_SDADC3 TRUE
+
+/* CAN attributes.*/
+#define STM32_HAS_CAN1 TRUE
+#define STM32_HAS_CAN2 FALSE
+#define STM32_CAN_MAX_FILTERS 14
+
+/* DAC attributes.*/
+#define STM32_HAS_DAC1 TRUE
+#define STM32_HAS_DAC2 TRUE
+
+/* DMA attributes.*/
+#define STM32_ADVANCED_DMA FALSE
+#define STM32_HAS_DMA1 TRUE
+#define STM32_HAS_DMA2 TRUE
+
+/* ETH attributes.*/
+#define STM32_HAS_ETH FALSE
+
+/* EXTI attributes.*/
+#define STM32_EXTI_NUM_CHANNELS 29
+
+/* GPIO attributes.*/
+#define STM32_HAS_GPIOA TRUE
+#define STM32_HAS_GPIOB TRUE
+#define STM32_HAS_GPIOC TRUE
+#define STM32_HAS_GPIOD TRUE
+#define STM32_HAS_GPIOE TRUE
+#define STM32_HAS_GPIOF TRUE
+#define STM32_HAS_GPIOG FALSE
+#define STM32_HAS_GPIOH FALSE
+#define STM32_HAS_GPIOI FALSE
+#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
+ RCC_AHBENR_GPIOBEN | \
+ RCC_AHBENR_GPIOCEN | \
+ RCC_AHBENR_GPIODEN | \
+ RCC_AHBENR_GPIOEEN | \
+ RCC_AHBENR_GPIOFEN)
+
+/* I2C attributes.*/
+#define STM32_HAS_I2C1 TRUE
+#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+
+#define STM32_HAS_I2C2 TRUE
+#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+
+#define STM32_HAS_I2C3 FALSE
+
+/* RTC attributes.*/
+#define STM32_HAS_RTC TRUE
+#define STM32_RTC_HAS_SUBSECONDS TRUE
+#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
+#define STM32_RTC_NUM_ALARMS 2
+#define STM32_RTC_HAS_INTERRUPTS FALSE
+
+/* SDIO attributes.*/
+#define STM32_HAS_SDIO FALSE
+
+/* SPI attributes.*/
+#define STM32_HAS_SPI1 TRUE
+#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+
+#define STM32_HAS_SPI2 TRUE
+#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+
+#define STM32_HAS_SPI3 TRUE
+#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
+#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
+
+#define STM32_HAS_SPI4 FALSE
+#define STM32_HAS_SPI5 FALSE
+#define STM32_HAS_SPI6 FALSE
+
+/* TIM attributes.*/
+#define STM32_TIM_MAX_CHANNELS 4
+
+#define STM32_HAS_TIM2 TRUE
+#define STM32_TIM2_IS_32BITS TRUE
+#define STM32_TIM2_CHANNELS 4
+
+#define STM32_HAS_TIM3 TRUE
+#define STM32_TIM3_IS_32BITS FALSE
+#define STM32_TIM3_CHANNELS 4
+
+#define STM32_HAS_TIM4 TRUE
+#define STM32_TIM4_IS_32BITS FALSE
+#define STM32_TIM4_CHANNELS 4
+
+#define STM32_HAS_TIM5 TRUE
+#define STM32_TIM5_IS_32BITS TRUE
+#define STM32_TIM5_CHANNELS 4
+
+#define STM32_HAS_TIM6 TRUE
+#define STM32_TIM6_IS_32BITS FALSE
+#define STM32_TIM6_CHANNELS 0
+
+#define STM32_HAS_TIM7 TRUE
+#define STM32_TIM7_IS_32BITS FALSE
+#define STM32_TIM7_CHANNELS 0
+
+#define STM32_HAS_TIM12 TRUE
+#define STM32_TIM12_IS_32BITS FALSE
+#define STM32_TIM12_CHANNELS 2
+
+#define STM32_HAS_TIM13 TRUE
+#define STM32_TIM13_IS_32BITS FALSE
+#define STM32_TIM13_CHANNELS 2
+
+#define STM32_HAS_TIM14 TRUE
+#define STM32_TIM14_IS_32BITS FALSE
+#define STM32_TIM14_CHANNELS 2
+
+#define STM32_HAS_TIM15 TRUE
+#define STM32_TIM15_IS_32BITS FALSE
+#define STM32_TIM15_CHANNELS 2
+
+#define STM32_HAS_TIM16 TRUE
+#define STM32_TIM16_IS_32BITS FALSE
+#define STM32_TIM16_CHANNELS 2
+
+#define STM32_HAS_TIM17 TRUE
+#define STM32_TIM17_IS_32BITS FALSE
+#define STM32_TIM17_CHANNELS 2
+
+#define STM32_HAS_TIM18 TRUE
+#define STM32_TIM18_IS_32BITS FALSE
+#define STM32_TIM18_CHANNELS 0
+
+#define STM32_HAS_TIM19 TRUE
+#define STM32_TIM19_IS_32BITS FALSE
+#define STM32_TIM19_CHANNELS 4
+
+#define STM32_HAS_TIM1 FALSE
+#define STM32_HAS_TIM8 FALSE
+#define STM32_HAS_TIM9 FALSE
+#define STM32_HAS_TIM10 FALSE
+#define STM32_HAS_TIM11 FALSE
+
+/* USART attributes.*/
+#define STM32_HAS_USART1 TRUE
+#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+
+#define STM32_HAS_USART2 TRUE
+#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+
+#define STM32_HAS_USART3 TRUE
+#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+
+#define STM32_HAS_UART4 FALSE
+#define STM32_HAS_UART5 FALSE
+#define STM32_HAS_USART6 FALSE
+
+/* USB attributes.*/
+#define STM32_HAS_USB FALSE
+#define STM32_HAS_OTG1 FALSE
+#define STM32_HAS_OTG2 FALSE
+#endif /* defined(STM32F378xx) */
/** @} */
#endif /* _STM32_REGISTRY_H_ */