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authorGiovanni Di Sirio <gdisirio@gmail.com>2015-11-28 10:55:48 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2015-11-28 10:55:48 +0000
commit56cf40e555db653dc503afe4e750f23ef5cb66d6 (patch)
treec6784562e3034df9520dd1f070e2c82d03f5c9f6 /os/hal
parent03f609e27c2dca200fce5b42f3a3467570e718bd (diff)
downloadChibiOS-56cf40e555db653dc503afe4e750f23ef5cb66d6.tar.gz
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ChibiOS-56cf40e555db653dc503afe4e750f23ef5cb66d6.zip
STM32 LPUART1 support added.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8539 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/ports/STM32/LLD/USARTv1/serial_lld.h16
-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/serial_lld.c59
-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/serial_lld.h47
-rw-r--r--os/hal/ports/STM32/STM32F0xx/stm32_registry.h10
-rw-r--r--os/hal/ports/STM32/STM32F1xx/stm32_registry.h6
-rw-r--r--os/hal/ports/STM32/STM32F37x/stm32_registry.h2
-rw-r--r--os/hal/ports/STM32/STM32F3xx/stm32_registry.h27
-rw-r--r--os/hal/ports/STM32/STM32F4xx/stm32_registry.h5
-rw-r--r--os/hal/ports/STM32/STM32F7xx/stm32_registry.h2
-rw-r--r--os/hal/ports/STM32/STM32L0xx/stm32_rcc.h25
-rw-r--r--os/hal/ports/STM32/STM32L0xx/stm32_registry.h16
-rw-r--r--os/hal/ports/STM32/STM32L1xx/stm32_registry.h1
-rw-r--r--os/hal/ports/STM32/STM32L4xx/hal_lld.c2
-rw-r--r--os/hal/ports/STM32/STM32L4xx/hal_lld.h22
-rw-r--r--os/hal/ports/STM32/STM32L4xx/stm32_rcc.h32
-rw-r--r--os/hal/ports/STM32/STM32L4xx/stm32_registry.h5
16 files changed, 258 insertions, 19 deletions
diff --git a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h
index 6923b3b70..420aac708 100644
--- a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h
@@ -42,7 +42,7 @@
/**
* @brief USART1 driver enable switch.
* @details If set to @p TRUE the support for USART1 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART1) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART1 FALSE
@@ -51,7 +51,7 @@
/**
* @brief USART2 driver enable switch.
* @details If set to @p TRUE the support for USART2 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART2) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART2 FALSE
@@ -60,7 +60,7 @@
/**
* @brief USART3 driver enable switch.
* @details If set to @p TRUE the support for USART3 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART3) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART3 FALSE
@@ -69,7 +69,7 @@
/**
* @brief UART4 driver enable switch.
* @details If set to @p TRUE the support for UART4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART4) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART4 FALSE
@@ -78,7 +78,7 @@
/**
* @brief UART5 driver enable switch.
* @details If set to @p TRUE the support for UART5 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART5) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART5 FALSE
@@ -87,7 +87,7 @@
/**
* @brief USART6 driver enable switch.
* @details If set to @p TRUE the support for USART6 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART6) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART6 FALSE
@@ -96,7 +96,7 @@
/**
* @brief UART7 driver enable switch.
* @details If set to @p TRUE the support for UART7 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART7) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART7 FALSE
@@ -105,7 +105,7 @@
/**
* @brief UART8 driver enable switch.
* @details If set to @p TRUE the support for UART8 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART8) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART8 FALSE
diff --git a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c
index 683df0481..88e05e26e 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c
@@ -98,6 +98,11 @@ SerialDriver SD7;
SerialDriver SD8;
#endif
+/** @brief LPUART1 serial driver identifier.*/
+#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
+SerialDriver LPSD1;
+#endif
+
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
@@ -126,6 +131,13 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
USART_TypeDef *u = sdp->usart;
/* Baud rate setting.*/
+#if STM32_SERIAL_USE_LPUART1
+ if ( sdp == &LPSD1 )
+ {
+ u->BRR = (uint32_t)( ( (uint64_t)sdp->clock * 256 ) / config->speed);
+ }
+ else
+#endif
u->BRR = (uint32_t)(sdp->clock / config->speed);
/* Note that some bits are enforced.*/
@@ -292,6 +304,14 @@ static void notify8(io_queue_t *qp) {
}
#endif
+#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
+static void notifylp1(io_queue_t *qp) {
+
+ (void)qp;
+ LPUART1->CR1 |= USART_CR1_TXEIE;
+}
+#endif
+
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
@@ -482,6 +502,25 @@ OSAL_IRQ_HANDLER(STM32_UART8_HANDLER) {
}
#endif
+#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
+#if !defined(STM32_LPUART1_HANDLER)
+#error "STM32_LPUART1_HANDLER not defined"
+#endif
+/**
+ * @brief LPUART1 interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(STM32_LPUART1_HANDLER) {
+
+ OSAL_IRQ_PROLOGUE();
+
+ serve_interrupt(&LPSD1);
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -565,6 +604,15 @@ void sd_lld_init(void) {
#endif
#endif
+#if STM32_SERIAL_USE_LPUART1
+ sdObjectInit(&LPSD1, NULL, notifylp1);
+ LPSD1.usart = LPUART1;
+ LPSD1.clock = STM32_LPUART1CLK;
+#if defined(STM32_LPUART1_NUMBER)
+ nvicEnableVector(STM32_LPUART1_NUMBER, STM32_SERIAL_LPUART1_PRIORITY);
+#endif
+#endif
+
#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \
STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || \
STM32_SERIAL_USE_UART7 || STM32_SERIAL_USE_UART8 || defined(__DOXYGEN__)
@@ -630,6 +678,11 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
rccEnableUART8(FALSE);
}
#endif
+#if STM32_SERIAL_USE_LPUART1
+ if (&LPSD1 == sdp) {
+ rccEnableLPUART1(FALSE);
+ }
+#endif
}
usart_init(sdp, config);
}
@@ -697,6 +750,12 @@ void sd_lld_stop(SerialDriver *sdp) {
return;
}
#endif
+#if STM32_SERIAL_USE_LPUART1
+ if (&LPSD1 == sdp) {
+ rccDisableLPUART1(FALSE);
+ return;
+ }
+#endif
}
}
diff --git a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h
index ba3d9ed94..61e70f112 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h
@@ -42,7 +42,7 @@
/**
* @brief USART1 driver enable switch.
* @details If set to @p TRUE the support for USART1 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART1) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART1 FALSE
@@ -51,7 +51,7 @@
/**
* @brief USART2 driver enable switch.
* @details If set to @p TRUE the support for USART2 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART2) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART2 FALSE
@@ -60,7 +60,7 @@
/**
* @brief USART3 driver enable switch.
* @details If set to @p TRUE the support for USART3 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART3) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART3 FALSE
@@ -69,7 +69,7 @@
/**
* @brief UART4 driver enable switch.
* @details If set to @p TRUE the support for UART4 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART4) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART4 FALSE
@@ -78,7 +78,7 @@
/**
* @brief UART5 driver enable switch.
* @details If set to @p TRUE the support for UART5 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART5) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART5 FALSE
@@ -87,7 +87,7 @@
/**
* @brief USART6 driver enable switch.
* @details If set to @p TRUE the support for USART6 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_USART6) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_USART6 FALSE
@@ -96,7 +96,7 @@
/**
* @brief UART7 driver enable switch.
* @details If set to @p TRUE the support for UART7 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART7) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART7 FALSE
@@ -105,13 +105,22 @@
/**
* @brief UART8 driver enable switch.
* @details If set to @p TRUE the support for UART8 is included.
- * @note The default is @p TRUE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_SERIAL_USE_UART8) || defined(__DOXYGEN__)
#define STM32_SERIAL_USE_UART8 FALSE
#endif
/**
+ * @brief LPUART1 driver enable switch.
+ * @details If set to @p TRUE the support for LPUART is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(STM32_SERIAL_USE_LPUART1) || defined(__DOXYGEN__)
+#define STM32_SERIAL_USE_LPUART1 FALSE
+#endif
+
+/**
* @brief USART1 interrupt priority level setting.
*/
#if !defined(STM32_SERIAL_USART1_PRIORITY) || defined(__DOXYGEN__)
@@ -174,6 +183,13 @@
#if !defined(STM32_SERIAL_UART8_PRIORITY) || defined(__DOXYGEN__)
#define STM32_SERIAL_UART8_PRIORITY 12
#endif
+
+/**
+ * @brief LPUART1 interrupt priority level setting.
+ */
+#if !defined(STM32_SERIAL_LPUART1_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_SERIAL_LPUART1_PRIORITY 12
+#endif
/** @} */
/*===========================================================================*/
@@ -212,10 +228,15 @@
#error "UART8 not present in the selected device"
#endif
+#if STM32_SERIAL_USE_LPUART1 && !STM32_HAS_LPUART1
+#error "LPUART1 not present in the selected device"
+#endif
+
#if !STM32_SERIAL_USE_USART1 && !STM32_SERIAL_USE_USART2 && \
!STM32_SERIAL_USE_USART3 && !STM32_SERIAL_USE_UART4 && \
!STM32_SERIAL_USE_UART5 && !STM32_SERIAL_USE_USART6 && \
- !STM32_SERIAL_USE_UART7 && !STM32_SERIAL_USE_UART8
+ !STM32_SERIAL_USE_UART7 && !STM32_SERIAL_USE_UART8 && \
+ !STM32_SERIAL_USE_LPUART1
#error "SERIAL driver activated but no USART/UART peripheral assigned"
#endif
@@ -259,6 +280,11 @@
#error "Invalid IRQ priority assigned to UART8"
#endif
+#if STM32_SERIAL_USE_LPUART1 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_LPUART1_PRIORITY)
+#error "Invalid IRQ priority assigned to LPUART1"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -352,6 +378,9 @@ extern SerialDriver SD7;
#if STM32_SERIAL_USE_UART8 && !defined(__DOXYGEN__)
extern SerialDriver SD8;
#endif
+#if STM32_SERIAL_USE_LPUART1 && !defined(__DOXYGEN__)
+extern SerialDriver LPSD1;
+#endif
#ifdef __cplusplus
extern "C" {
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index 9ed7d014e..c8baca553 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -241,6 +241,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -490,6 +491,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#if defined(STM32F072xB) || defined(STM32F078xx)
@@ -703,6 +705,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -901,6 +904,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -1102,6 +1106,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1375,6 +1380,7 @@
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
#else
#define STM32_HAS_USART3 FALSE
#define STM32_HAS_UART4 FALSE
@@ -1382,6 +1388,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
#endif
/* USB attributes.*/
@@ -1619,6 +1626,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1983,6 +1991,8 @@
STM32_DMA_STREAM_ID_MSK(2, 5))
#define STM32_UART8_TX_DMA_CHN 0x0F0FF0FF
+#define STM32_HAS_LPUART1 FALSE
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 FALSE
diff --git a/os/hal/ports/STM32/STM32F1xx/stm32_registry.h b/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
index 0e8cb6663..779757d20 100644
--- a/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
@@ -233,6 +233,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -401,6 +402,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -582,6 +584,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -822,6 +825,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1059,6 +1063,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1278,6 +1283,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_registry.h b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
index b2a4dfafe..733c50852 100644
--- a/os/hal/ports/STM32/STM32F37x/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
@@ -253,6 +253,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -496,6 +497,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
index 2bb7d74ff..9a6e2985c 100644
--- a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
@@ -247,6 +247,9 @@
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -449,6 +452,9 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -647,6 +653,9 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -845,6 +854,9 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1068,6 +1080,9 @@
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1268,6 +1283,9 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -1464,6 +1482,9 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -1686,6 +1707,9 @@
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1885,6 +1909,9 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
index c5b6a2e0b..146f26e4f 100644
--- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
@@ -386,6 +386,8 @@
#define STM32_UART8_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 0)
#define STM32_UART8_TX_DMA_CHN 0x00000005
+#define STM32_HAS_LPUART1 FALSE
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 TRUE
@@ -721,6 +723,7 @@
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -1011,6 +1014,7 @@
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -1292,6 +1296,7 @@
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
index 782d8c9b9..5f6c02e6a 100644
--- a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
@@ -450,6 +450,8 @@
#define STM32_UART8_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 0)
#define STM32_UART8_TX_DMA_CHN 0x00000005
+#define STM32_HAS_LPUART1 FALSE
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h
index 892cd1c9b..44981343d 100644
--- a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h
@@ -584,6 +584,31 @@
* @api
*/
#define rccResetUSART3() rccResetAPB1(RCC_APB1RSTR_USART3RST)
+
+/**
+ * @brief Enables the LPUART1 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableLPUART1(lp) rccEnableAPB1(RCC_APB1ENR_LPUART1EN, lp)
+
+/**
+ * @brief Disables the LPUART1 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableLPUART1(lp) rccDisableAPB1(RCC_APB1ENR_LPUART1EN, lp)
+
+/**
+ * @brief Resets the USART1 peripheral.
+ *
+ * @api
+ */
+#define rccResetLPUART1() rccResetAPB1(RCC_APB1RSTR_LPUART1RST)
/** @} */
/**
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
index 4a1ad5acb..a92a5ffa4 100644
--- a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
@@ -249,6 +249,10 @@
STM32_DMA_STREAM_ID_MSK(1, 7))
#define STM32_USART2_TX_DMA_CHN 0x04004000
+#define STM32_HAS_LPUART1 TRUE
+#define STM32_LPUART1_HANDLER VectorB4
+#define STM32_LPUART1_NUMBER 29
+
#define STM32_HAS_USART3 FALSE
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
@@ -491,10 +495,16 @@
STM32_DMA_STREAM_ID_MSK(1, 7))
#define STM32_USART2_TX_DMA_CHN 0x04004000
+#define STM32_HAS_LPUART1 TRUE
+#define STM32_LPUART1_HANDLER VectorB4
+#define STM32_LPUART1_NUMBER 29
+
#define STM32_HAS_USART3 FALSE
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -739,10 +749,16 @@
STM32_DMA_STREAM_ID_MSK(1, 7))
#define STM32_USART2_TX_DMA_CHN 0x04004000
+#define STM32_HAS_LPUART1 TRUE
+#define STM32_LPUART1_HANDLER VectorB4
+#define STM32_LPUART1_NUMBER 29
+
#define STM32_HAS_USART3 FALSE
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
index ff369eb6b..654dfa78a 100644
--- a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
@@ -313,6 +313,7 @@
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
+#define STM32_HAS_LPUART1 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.c b/os/hal/ports/STM32/STM32L4xx/hal_lld.c
index 30aa83ad7..b4298d3ae 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.c
@@ -243,7 +243,7 @@ void stm32_clock_init(void) {
STM32_CLK48SEL | STM32_LPTIM2SEL | STM32_LPTIM1SEL |
STM32_I2C3SEL | STM32_I2C2SEL | STM32_I2C1SEL |
STM32_UART5SEL | STM32_UART4SEL | STM32_USART3SEL |
- STM32_USART2SEL | STM32_USART1SEL;
+ STM32_USART2SEL | STM32_USART1SEL | STM32_LPUART1SEL;
#if STM32_SAI2SEL != STM32_SAI2SEL_OFF
ccipr |= STM32_SAI2SEL;
#endif
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index ec107d911..2827f2fa2 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -645,6 +645,13 @@
#endif
/**
+ * @brief LPUART1 clock source.
+ */
+#if !defined(STM32_LPUART1SEL) || defined(__DOXYGEN__)
+#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
+#endif
+
+/**
* @brief I2C1 clock source.
*/
#if !defined(STM32_I2C1SEL) || defined(__DOXYGEN__)
@@ -1833,6 +1840,21 @@
#endif
/**
+ * @brief LPUART1 clock frequency.
+ */
+#if (STM32_LPUART1SEL == STM32_LPUART1SEL_PCLK1) || defined(__DOXYGEN)
+#define STM32_LPUART1CLK STM32_PCLK1
+#elif STM32_LPUART1SEL == STM32_LPUART1SEL_SYSCLK
+#define STM32_LPUART1CLK STM32_SYSCLK
+#elif STM32_LPUART1SEL == STM32_LPUART1SEL_HSI16
+#define STM32_LPUART1CLK STM32_HSI16CLK
+#elif STM32_LPUART1SEL == STM32_LPUART1SEL_LSE
+#define STM32_LPUART1CLK STM32_LSECLK
+#else
+#error "invalid source selected for LPUART1 clock"
+#endif
+
+/**
* @brief I2C1 clock frequency.
*/
#if (STM32_I2C1SEL == STM32_I2C1SEL_PCLK1) || defined(__DOXYGEN)
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
index 434ddde16..c45341540 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
@@ -1064,6 +1064,38 @@
* @api
*/
#define rccDisableUART5(lp) rccDisableAPB1R1(RCC_APB1ENR1_UART5EN, lp)
+
+/**
+ * @brief Resets the UART5 peripheral.
+ *
+ * @api
+ */
+#define rccResetUART5() rccResetAPB1R1(RCC_APB1RSTR1_UART5RST)
+
+/**
+ * @brief Enables the LPUART1 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableLPUART1(lp) rccEnableAPB1R2(RCC_APB1ENR2_LPUART1EN, lp)
+
+/**
+ * @brief Disables the LPUART1 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableLPUART1(lp) rccDisableAPB1R2(RCC_APB1ENR2_LPUART1EN, lp)
+
+/**
+ * @brief Resets the USART1 peripheral.
+ *
+ * @api
+ */
+#define rccResetLPUART1() rccResetAPB1R2(RCC_APB1RSTR2_LPUART1RST)
/** @} */
/*===========================================================================*/
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
index 640753f3b..dea76f8e2 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
@@ -370,13 +370,16 @@
#define STM32_UART5_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 1)
#define STM32_UART5_TX_DMA_CHN 0x00000002
+#define STM32_HAS_LPUART1 TRUE
+#define STM32_LPUART1_HANDLER Vector158
+#define STM32_LPUART1_NUMBER 70
+
#define STM32_HAS_USART6 FALSE
#define STM32_HAS_UART7 FALSE
#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
-
#define STM32_HAS_OTG1 TRUE
#define STM32_OTG1_HANDLER Vector14C
#define STM32_OTG1_NUMBER 67