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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-04 13:52:45 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-04 13:52:45 +0000 |
| commit | 289b799d03dd465ad502d85e614a3be92a1fe407 (patch) | |
| tree | caadda550079a2413cf50e5b1b1abd0d713dbcb7 /os/hal | |
| parent | c2994bdb33024b71f3ac0b4283994715ce6eb563 (diff) | |
| download | ChibiOS-289b799d03dd465ad502d85e614a3be92a1fe407.tar.gz ChibiOS-289b799d03dd465ad502d85e614a3be92a1fe407.tar.bz2 ChibiOS-289b799d03dd465ad502d85e614a3be92a1fe407.zip | |
More fixes but SPIv3 still does not work.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11221 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c | 30 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32H7xx/hal_lld.h | 2 |
2 files changed, 13 insertions, 19 deletions
diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c index 71dd11702..0af6c7290 100644 --- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c @@ -423,7 +423,7 @@ void spi_lld_start(SPIDriver *spip) { osalDbgAssert(!b, "stream already allocated");
rccEnableSPI1(false);
dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI1_RX);
- dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI1_TX);
+ dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI1_TX);
}
#endif
#if STM32_SPI_USE_SPI2
@@ -441,7 +441,7 @@ void spi_lld_start(SPIDriver *spip) { osalDbgAssert(!b, "stream already allocated");
rccEnableSPI2(false);
dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI2_RX);
- dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI2_TX);
+ dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI2_TX);
}
#endif
#if STM32_SPI_USE_SPI3
@@ -459,7 +459,7 @@ void spi_lld_start(SPIDriver *spip) { osalDbgAssert(!b, "stream already allocated");
rccEnableSPI3(false);
dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI3_RX);
- dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI3_TX);
+ dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI3_TX);
}
#endif
#if STM32_SPI_USE_SPI4
@@ -477,7 +477,7 @@ void spi_lld_start(SPIDriver *spip) { osalDbgAssert(!b, "stream already allocated");
rccEnableSPI4(false);
dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI4_RX);
- dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI4_TX);
+ dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI4_TX);
}
#endif
#if STM32_SPI_USE_SPI5
@@ -495,7 +495,7 @@ void spi_lld_start(SPIDriver *spip) { osalDbgAssert(!b, "stream already allocated");
rccEnableSPI5(false);
dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI5_RX);
- dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI5_TX);
+ dmaSetRequestSource(spip->dmatx, STM32_DMAMUX1_SPI5_TX);
}
#endif
#if STM32_SPI_USE_SPI6
@@ -513,7 +513,7 @@ void spi_lld_start(SPIDriver *spip) { osalDbgAssert(!b, "stream already allocated");
rccEnableSPI6(false);
dmaSetRequestSource(spip->dmarx, STM32_DMAMUX2_SPI6_RX);
- dmaSetRequestSource(spip->dmarx, STM32_DMAMUX2_SPI6_TX);
+ dmaSetRequestSource(spip->dmatx, STM32_DMAMUX2_SPI6_TX);
}
#endif
@@ -529,31 +529,25 @@ void spi_lld_start(SPIDriver *spip) { if (dsize <= 8U) {
/* Frame width is between 4 and 8 bits.*/
spip->rxdmamode = (spip->rxdmamode & ~STM32_DMA_CR_SIZE_MASK) |
- STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE |
- STM32_DMA_CR_PFCTRL;
+ STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
- STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE |
- STM32_DMA_CR_PFCTRL;
+ STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
cfg1 |= SPI_CFG1_FTHLV_2; /* FTHLV = 4.*/
}
else if (dsize <= 16U) {
/* Frame width is between 9 and 16 bits.*/
spip->rxdmamode = (spip->rxdmamode & ~STM32_DMA_CR_SIZE_MASK) |
- STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD |
- STM32_DMA_CR_PFCTRL;
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
- STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD |
- STM32_DMA_CR_PFCTRL;
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
cfg1 |= SPI_CFG1_FTHLV_1; /* FTHLV = 2.*/
}
else {
/* Frame width is between 16 and 32 bits.*/
spip->rxdmamode = (spip->rxdmamode & ~STM32_DMA_CR_SIZE_MASK) |
- STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD |
- STM32_DMA_CR_PFCTRL;
+ STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD;
spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) |
- STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD |
- STM32_DMA_CR_PFCTRL;
+ STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD;
cfg1 |= SPI_CFG1_FTHLV_0; /* FTHLV = 1.*/
}
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.h b/os/hal/ports/STM32/STM32H7xx/hal_lld.h index 99e235430..32bea6a0c 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.h @@ -2509,7 +2509,7 @@ #define STM32_SPI1CLK 0 /* Unknown, would require a board value */
#define STM32_SPI2CLK 0 /* Unknown, would require a board value */
#define STM32_SPI3CLK 0 /* Unknown, would require a board value */
-#elif STM32_SPI123SEL == STM32_SPI123SEL_PLL2_P_CK
+#elif STM32_SPI123SEL == STM32_SPI123SEL_PER_CK
#define STM32_SPI1CLK STM32_PER_CK
#define STM32_SPI2CLK STM32_PER_CK
#define STM32_SPI3CLK STM32_PER_CK
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