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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-06-23 11:49:27 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-06-23 11:49:27 +0000 |
commit | 2454bb1133b870cf7ae6efafbca759be917fca5b (patch) | |
tree | 654d55844bfd72cb94517cdca2885c6406808b01 /os/hal | |
parent | 5947df3ba24b7ebf93c352a284927152c6e10747 (diff) | |
download | ChibiOS-2454bb1133b870cf7ae6efafbca759be917fca5b.tar.gz ChibiOS-2454bb1133b870cf7ae6efafbca759be917fca5b.tar.bz2 ChibiOS-2454bb1133b870cf7ae6efafbca759be917fca5b.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4327 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r-- | os/hal/platforms/STM32/gpt_lld.c | 18 | ||||
-rw-r--r-- | os/hal/platforms/STM32/gpt_lld.h | 30 | ||||
-rw-r--r-- | os/hal/platforms/STM32/icu_lld.c | 24 | ||||
-rw-r--r-- | os/hal/platforms/STM32/icu_lld.h | 30 | ||||
-rw-r--r-- | os/hal/platforms/STM32/pwm_lld.c | 24 | ||||
-rw-r--r-- | os/hal/platforms/STM32/pwm_lld.h | 30 |
6 files changed, 156 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/gpt_lld.c b/os/hal/platforms/STM32/gpt_lld.c index 36b1b8fd3..22b6cb054 100644 --- a/os/hal/platforms/STM32/gpt_lld.c +++ b/os/hal/platforms/STM32/gpt_lld.c @@ -111,6 +111,9 @@ static void gpt_lld_serve_interrupt(GPTDriver *gptp) { /*===========================================================================*/
#if STM32_GPT_USE_TIM1
+#if !defined(STM32_TIM1_UP_HANDLER)
+#error "STM32_TIM1_UP_HANDLER not defined"
+#endif
/**
* @brief TIM2 interrupt handler.
*
@@ -127,6 +130,9 @@ CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) { #endif /* STM32_GPT_USE_TIM1 */
#if STM32_GPT_USE_TIM2
+#if !defined(STM32_TIM2_HANDLER)
+#error "STM32_TIM2_HANDLER not defined"
+#endif
/**
* @brief TIM2 interrupt handler.
*
@@ -143,6 +149,9 @@ CH_IRQ_HANDLER(STM32_TIM2_HANDLER) { #endif /* STM32_GPT_USE_TIM2 */
#if STM32_GPT_USE_TIM3
+#if !defined(STM32_TIM3_HANDLER)
+#error "STM32_TIM3_HANDLER not defined"
+#endif
/**
* @brief TIM3 interrupt handler.
*
@@ -159,6 +168,9 @@ CH_IRQ_HANDLER(STM32_TIM3_HANDLER) { #endif /* STM32_GPT_USE_TIM3 */
#if STM32_GPT_USE_TIM4
+#if !defined(STM32_TIM4_HANDLER)
+#error "STM32_TIM4_HANDLER not defined"
+#endif
/**
* @brief TIM4 interrupt handler.
*
@@ -175,6 +187,9 @@ CH_IRQ_HANDLER(STM32_TIM4_HANDLER) { #endif /* STM32_GPT_USE_TIM4 */
#if STM32_GPT_USE_TIM5
+#if !defined(STM32_TIM5_HANDLER)
+#error "STM32_TIM5_HANDLER not defined"
+#endif
/**
* @brief TIM5 interrupt handler.
*
@@ -191,6 +206,9 @@ CH_IRQ_HANDLER(STM32_TIM5_HANDLER) { #endif /* STM32_GPT_USE_TIM5 */
#if STM32_GPT_USE_TIM8
+#if !defined(STM32_TIM8_UP_HANDLER)
+#error "STM32_TIM8_UP_HANDLER not defined"
+#endif
/**
* @brief TIM8 interrupt handler.
*
diff --git a/os/hal/platforms/STM32/gpt_lld.h b/os/hal/platforms/STM32/gpt_lld.h index 48720e284..40de603d4 100644 --- a/os/hal/platforms/STM32/gpt_lld.h +++ b/os/hal/platforms/STM32/gpt_lld.h @@ -174,6 +174,36 @@ #error "GPT driver activated but no TIM peripheral assigned"
#endif
+#if STM32_GPT_USE_TIM1 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM1_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM1"
+#endif
+
+#if STM32_GPT_USE_TIM2 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM2_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM2"
+#endif
+
+#if STM32_GPT_USE_TIM3 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM3_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM3"
+#endif
+
+#if STM32_GPT_USE_TIM4 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM4_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM4"
+#endif
+
+#if STM32_GPT_USE_TIM5 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM5_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM5"
+#endif
+
+#if STM32_GPT_USE_TIM8 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM8_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM8"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/os/hal/platforms/STM32/icu_lld.c b/os/hal/platforms/STM32/icu_lld.c index 7102df87d..8e546d80d 100644 --- a/os/hal/platforms/STM32/icu_lld.c +++ b/os/hal/platforms/STM32/icu_lld.c @@ -125,6 +125,9 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) { /*===========================================================================*/
#if STM32_ICU_USE_TIM1
+#if !defined(STM32_TIM1_UP_HANDLER)
+#error "STM32_TIM1_UP_HANDLER not defined"
+#endif
/**
* @brief TIM1 compare interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -142,6 +145,9 @@ CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) { CH_IRQ_EPILOGUE();
}
+#if !defined(STM32_TIM1_CC_HANDLER)
+#error "STM32_TIM1_CC_HANDLER not defined"
+#endif
/**
* @brief TIM1 compare interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -161,6 +167,9 @@ CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) { #endif /* STM32_ICU_USE_TIM1 */
#if STM32_ICU_USE_TIM2
+#if !defined(STM32_TIM2_HANDLER)
+#error "STM32_TIM2_HANDLER not defined"
+#endif
/**
* @brief TIM2 interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -180,6 +189,9 @@ CH_IRQ_HANDLER(STM32_TIM2_HANDLER) { #endif /* STM32_ICU_USE_TIM2 */
#if STM32_ICU_USE_TIM3
+#if !defined(STM32_TIM3_HANDLER)
+#error "STM32_TIM3_HANDLER not defined"
+#endif
/**
* @brief TIM3 interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -199,6 +211,9 @@ CH_IRQ_HANDLER(STM32_TIM3_HANDLER) { #endif /* STM32_ICU_USE_TIM3 */
#if STM32_ICU_USE_TIM4
+#if !defined(STM32_TIM4_HANDLER)
+#error "STM32_TIM4_HANDLER not defined"
+#endif
/**
* @brief TIM4 interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -218,6 +233,9 @@ CH_IRQ_HANDLER(STM32_TIM4_HANDLER) { #endif /* STM32_ICU_USE_TIM4 */
#if STM32_ICU_USE_TIM5
+#if !defined(STM32_TIM5_HANDLER)
+#error "STM32_TIM5_HANDLER not defined"
+#endif
/**
* @brief TIM5 interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -237,6 +255,9 @@ CH_IRQ_HANDLER(STM32_TIM5_HANDLER) { #endif /* STM32_ICU_USE_TIM5 */
#if STM32_ICU_USE_TIM8
+#if !defined(STM32_TIM8_UP_HANDLER)
+#error "STM32_TIM8_UP_HANDLER not defined"
+#endif
/**
* @brief TIM8 compare interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -254,6 +275,9 @@ CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) { CH_IRQ_EPILOGUE();
}
+#if !defined(STM32_TIM8_CC_HANDLER)
+#error "STM32_TIM8_CC_HANDLER not defined"
+#endif
/**
* @brief TIM8 compare interrupt handler.
* @note It is assumed that the various sources are only activated if the
diff --git a/os/hal/platforms/STM32/icu_lld.h b/os/hal/platforms/STM32/icu_lld.h index 99b474c32..faa592ede 100644 --- a/os/hal/platforms/STM32/icu_lld.h +++ b/os/hal/platforms/STM32/icu_lld.h @@ -174,6 +174,36 @@ #error "ICU driver activated but no TIM peripheral assigned"
#endif
+#if STM32_ICU_USE_TIM1 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM1_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM1"
+#endif
+
+#if STM32_ICU_USE_TIM2 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM2_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM2"
+#endif
+
+#if STM32_ICU_USE_TIM3 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM3_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM3"
+#endif
+
+#if STM32_ICU_USE_TIM4 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM4_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM4"
+#endif
+
+#if STM32_ICU_USE_TIM5 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM5_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM5"
+#endif
+
+#if STM32_ICU_USE_TIM8 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM8_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM8"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c index 324aa1553..0fd66d168 100644 --- a/os/hal/platforms/STM32/pwm_lld.c +++ b/os/hal/platforms/STM32/pwm_lld.c @@ -126,6 +126,9 @@ static void serve_interrupt(PWMDriver *pwmp) { /*===========================================================================*/
#if STM32_PWM_USE_TIM1
+#if !defined(STM32_TIM1_UP_HANDLER)
+#error "STM32_TIM1_UP_HANDLER not defined"
+#endif
/**
* @brief TIM1 update interrupt handler.
* @note It is assumed that this interrupt is only activated if the callback
@@ -144,6 +147,9 @@ CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) { CH_IRQ_EPILOGUE();
}
+#if !defined(STM32_TIM1_CC_HANDLER)
+#error "STM32_TIM1_CC_HANDLER not defined"
+#endif
/**
* @brief TIM1 compare interrupt handler.
* @note It is assumed that the various sources are only activated if the
@@ -174,6 +180,9 @@ CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) { #endif /* STM32_PWM_USE_TIM1 */
#if STM32_PWM_USE_TIM2
+#if !defined(STM32_TIM2_HANDLER)
+#error "STM32_TIM2_HANDLER not defined"
+#endif
/**
* @brief TIM2 interrupt handler.
*
@@ -190,6 +199,9 @@ CH_IRQ_HANDLER(STM32_TIM2_HANDLER) { #endif /* STM32_PWM_USE_TIM2 */
#if STM32_PWM_USE_TIM3
+#if !defined(STM32_TIM3_HANDLER)
+#error "STM32_TIM3_HANDLER not defined"
+#endif
/**
* @brief TIM3 interrupt handler.
*
@@ -206,6 +218,9 @@ CH_IRQ_HANDLER(STM32_TIM3_HANDLER) { #endif /* STM32_PWM_USE_TIM3 */
#if STM32_PWM_USE_TIM4
+#if !defined(STM32_TIM4_HANDLER)
+#error "STM32_TIM4_HANDLER not defined"
+#endif
/**
* @brief TIM4 interrupt handler.
*
@@ -222,6 +237,9 @@ CH_IRQ_HANDLER(STM32_TIM4_HANDLER) { #endif /* STM32_PWM_USE_TIM4 */
#if STM32_PWM_USE_TIM5
+#if !defined(STM32_TIM5_HANDLER)
+#error "STM32_TIM5_HANDLER not defined"
+#endif
/**
* @brief TIM5 interrupt handler.
*
@@ -238,6 +256,9 @@ CH_IRQ_HANDLER(STM32_TIM5_HANDLER) { #endif /* STM32_PWM_USE_TIM5 */
#if STM32_PWM_USE_TIM8
+#if !defined(STM32_TIM8_UP_HANDLER)
+#error "STM32_TIM8_UP_HANDLER not defined"
+#endif
/**
* @brief TIM8 update interrupt handler.
* @note It is assumed that this interrupt is only activated if the callback
@@ -256,6 +277,9 @@ CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) { CH_IRQ_EPILOGUE();
}
+#if !defined(STM32_TIM8_CC_HANDLER)
+#error "STM32_TIM8_CC_HANDLER not defined"
+#endif
/**
* @brief TIM8 compare interrupt handler.
* @note It is assumed that the various sources are only activated if the
diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index 83911b1e9..680472c29 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -223,6 +223,36 @@ #error "advanced mode selected but no advanced timer assigned"
#endif
+#if STM32_PWM_USE_TIM1 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM1_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM1"
+#endif
+
+#if STM32_PWM_USE_TIM2 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM2_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM2"
+#endif
+
+#if STM32_PWM_USE_TIM3 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM3_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM3"
+#endif
+
+#if STM32_PWM_USE_TIM4 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM4_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM4"
+#endif
+
+#if STM32_PWM_USE_TIM5 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM5_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM5"
+#endif
+
+#if STM32_PWM_USE_TIM8 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM8_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM8"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
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