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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-02-23 09:56:01 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-02-23 09:56:01 +0000 |
| commit | 13f3a2a253cd06673f5ec3fcdafaaad753cb35cf (patch) | |
| tree | d0c19976dddad0ab471ee74641f3f7fa97adb393 /os/hal | |
| parent | c716b58ebcd26e3d96d6d339449b7dfe0fefb090 (diff) | |
| download | ChibiOS-13f3a2a253cd06673f5ec3fcdafaaad753cb35cf.tar.gz ChibiOS-13f3a2a253cd06673f5ec3fcdafaaad753cb35cf.tar.bz2 ChibiOS-13f3a2a253cd06673f5ec3fcdafaaad753cb35cf.zip | |
Fixed bug #918.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11542 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/hal_lld.h | 4 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F7xx/hal_lld.h | 15 |
2 files changed, 14 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.h b/os/hal/ports/STM32/STM32F4xx/hal_lld.h index 2df64083c..6125c9a31 100644 --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.h @@ -1961,8 +1961,10 @@ #define STM32_FLASHBITS 0x00000006
#elif STM32_HCLK <= STM32_7WS_THRESHOLD
#define STM32_FLASHBITS 0x00000007
-#else
+#elif STM32_HCLK <= STM32_8WS_THRESHOLD
#define STM32_FLASHBITS 0x00000008
+#else
+#error "invalid frequency at specified VDD level"
#endif
/* There are differences in vector names in the various sub-families,
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h index 088635a35..24498264e 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h @@ -930,8 +930,9 @@ #define STM32_4WS_THRESHOLD 150000000
#define STM32_5WS_THRESHOLD 180000000
#define STM32_6WS_THRESHOLD 210000000
-#define STM32_7WS_THRESHOLD 0
+#define STM32_7WS_THRESHOLD STM32_SYSCLK_MAX
#define STM32_8WS_THRESHOLD 0
+#define STM32_9WS_THRESHOLD 0
#elif (STM32_VDD >= 240) && (STM32_VDD < 270)
#define STM32_0WS_THRESHOLD 24000000
@@ -942,7 +943,8 @@ #define STM32_5WS_THRESHOLD 144000000
#define STM32_6WS_THRESHOLD 168000000
#define STM32_7WS_THRESHOLD 192000000
-#define STM32_8WS_THRESHOLD 0
+#define STM32_8WS_THRESHOLD STM32_SYSCLK_MAX
+#define STM32_9WS_THRESHOLD 0
#elif (STM32_VDD >= 210) && (STM32_VDD < 240)
#define STM32_0WS_THRESHOLD 22000000
@@ -954,6 +956,7 @@ #define STM32_6WS_THRESHOLD 154000000
#define STM32_7WS_THRESHOLD 176000000
#define STM32_8WS_THRESHOLD 198000000
+#define STM32_9WS_THRESHOLD STM32_SYSCLK_MAX
#elif (STM32_VDD >= 180) && (STM32_VDD < 210)
#define STM32_0WS_THRESHOLD 20000000
@@ -964,7 +967,8 @@ #define STM32_5WS_THRESHOLD 120000000
#define STM32_6WS_THRESHOLD 140000000
#define STM32_7WS_THRESHOLD 160000000
-#define STM32_8WS_THRESHOLD 0
+#define STM32_8WS_THRESHOLD 180000000
+#define STM32_9WS_THRESHOLD 0
#else
#error "invalid VDD voltage specified"
@@ -2058,8 +2062,11 @@ #elif STM32_HCLK <= STM32_8WS_THRESHOLD
#define STM32_FLASHBITS 0x00000008
-#else
+#elif STM32_HCLK <= STM32_9WS_THRESHOLD
#define STM32_FLASHBITS 0x00000009
+
+#else
+#error "invalid frequency at specified VDD level"
#endif
/*===========================================================================*/
|