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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-12-30 11:22:26 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-12-30 11:22:26 +0000 |
| commit | 13d1d184c8ca5120895935366b21ded41c850177 (patch) | |
| tree | 5aa824480ac7e6b34900aff7fcbcc887c71a020e /os/hal | |
| parent | f7a8d90622f39f67d867dd0878e50ab713af745d (diff) | |
| download | ChibiOS-13d1d184c8ca5120895935366b21ded41c850177.tar.gz ChibiOS-13d1d184c8ca5120895935366b21ded41c850177.tar.bz2 ChibiOS-13d1d184c8ca5120895935366b21ded41c850177.zip | |
More H7 ADC code.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12494 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c | 11 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h | 4 |
2 files changed, 13 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c index 61d453c0b..b45aef900 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c @@ -151,12 +151,18 @@ static void adc_lld_analog_off(ADCDriver *adcp) { */
static void adc_lld_calibrate(ADCDriver *adcp) {
- osalDbgAssert(adcp->adcm->CR == ADC_CR_ADVREGEN, "invalid register state");
+ osalDbgAssert(adcp->adcm->CR == ADC_CR_ADVREGEN, "invalid register state");
+
+ adcp->adcm->CR = adcp->config->calibration & (ADC_CR_ADCALDIF |
+ ADC_CR_ADCALLIN);
adcp->adcm->CR |= ADC_CR_ADCAL;
while ((adcp->adcm->CR & ADC_CR_ADCAL) != 0U)
;
#if STM32_ADC_DUAL_MODE
osalDbgAssert(adcp->adcs->CR == ADC_CR_ADVREGEN, "invalid register state");
+
+ adcp->adcs->CR = adcp->config->calibration & (ADC_CR_ADCALDIF |
+ ADC_CR_ADCALLIN);
adcp->adcs->CR |= ADC_CR_ADCAL;
while ((adcp->adcs->CR & ADC_CR_ADCAL) != 0U)
;
@@ -175,6 +181,7 @@ static void adc_lld_stop_adc(ADCDriver *adcp) { while (adcp->adcm->CR & ADC_CR_ADSTP)
;
}
+ adcp->adcm->PCSEL = 0U;
}
/**
@@ -407,6 +414,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp);
osalDbgAssert(adcp->data.dma != NULL, "unable to allocate stream");
rccEnableADC12(true);
+ dmaSetRequestSource(adcp->data.dma, STM32_DMAMUX1_ADC1);
}
#endif /* STM32_ADC_USE_ADC12 == TRUE */
@@ -418,6 +426,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp);
osalDbgAssert(adcp->data.bdma != NULL, "unable to allocate stream");
rccEnableADC3(true);
+ bdmaSetRequestSource(adcp->data.bdma, STM32_DMAMUX2_ADC3_REQ);
}
#endif /* STM32_ADC_USE_ADC3 == TRUE */
diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h index e345bbcc3..ce5460f62 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h @@ -482,7 +482,9 @@ typedef union { */
#define adc_lld_config_fields \
/* ADC DIFSEL register initialization data.*/ \
- uint32_t difsel
+ uint32_t difsel; \
+ /* Calibration mode, specify ADCCALIN and/or ADCCALDIF bits in here.*/ \
+ uint32_t calibration
#if (STM32_ADC_DUAL_MODE == TRUE) || defined(__DOXYGEN__)
#define adc_lld_configuration_group_fields \
|