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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-12-21 09:32:52 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-12-21 09:32:52 +0000
commitea082a74c922c22328ab4d140b0eea7b327981f2 (patch)
treea53b928a2c3c375fcac3723765e7202d3b0897a5 /os/hal/ports
parent6184745e4e2c15aea3c78b7e2e8639fd6cbf7bf6 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7590 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports')
-rw-r--r--os/hal/ports/STM32/LLD/USBv1/stm32_usb.h60
-rw-r--r--os/hal/ports/STM32/LLD/USBv1/usb_lld.c28
-rw-r--r--os/hal/ports/STM32/STM32F0xx/hal_lld.c4
-rw-r--r--os/hal/ports/STM32/STM32F0xx/stm32_registry.h2
-rw-r--r--os/hal/ports/STM32/STM32F1xx/stm32_registry.h6
-rw-r--r--os/hal/ports/STM32/STM32F37x/stm32_registry.h4
-rw-r--r--os/hal/ports/STM32/STM32F3xx/stm32_registry.h10
-rw-r--r--os/hal/ports/STM32/STM32L1xx/stm32_registry.h4
8 files changed, 72 insertions, 46 deletions
diff --git a/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h b/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h
index 7b74bf7d9..012b9d491 100644
--- a/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h
+++ b/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h
@@ -34,45 +34,56 @@
#define USB_ENDOPOINTS_NUMBER 7
/**
+ * @brief Width of USB packet memory accesses.
+ */
+#if STM32_USB_ACCESS_SCHEME_2x16
+typedef uint16_t stm32_usb_pma_t;
+#else
+typedef uint32_t stm32_usb_pma_t;
+#endif
+
+/**
* @brief USB registers block.
*/
typedef struct {
/**
* @brief Endpoint registers.
*/
- volatile uint32_t EPR[USB_ENDOPOINTS_NUMBER + 1];
+ volatile uint32_t EPR[USB_ENDOPOINTS_NUMBER + 1];
/*
* @brief Reserved space.
*/
- volatile uint32_t _r20[8];
+ volatile uint32_t _r20[8];
/*
* @brief Control Register.
*/
- volatile uint32_t CNTR;
+ volatile uint32_t CNTR;
/*
* @brief Interrupt Status Register.
*/
- volatile uint32_t ISTR;
+ volatile uint32_t ISTR;
/*
* @brief Frame Number Register.
*/
- volatile uint32_t FNR;
+ volatile uint32_t FNR;
/*
* @brief Device Address Register.
*/
- volatile uint32_t DADDR;
+ volatile uint32_t DADDR;
/*
* @brief Buffer Table Address.
*/
- volatile uint32_t BTABLE;
+ volatile uint32_t BTABLE;
/*
* @brief LPM Control and Status Register.
*/
- volatile uint32_t LPMCSR;
+ volatile uint32_t LPMCSR;
+#if STM32_USB_HAS_BCDR
/*
* @brief Battery Charging Detector
*/
- volatile uint32_t BCDR;
+ volatile uint32_t BCDR;
+#endif
} stm32_usb_t;
/**
@@ -82,35 +93,27 @@ typedef struct {
/**
* @brief TX buffer offset register.
*/
- volatile uint32_t TXADDR0;
+ volatile stm32_usb_pma_t TXADDR0;
/**
* @brief TX counter register 0.
*/
- volatile uint16_t TXCOUNT0;
- /**
- * @brief TX counter register 1.
- */
- volatile uint16_t TXCOUNT1;
+ volatile stm32_usb_pma_t TXCOUNT0;
/**
* @brief RX buffer offset register.
*/
- volatile uint32_t RXADDR0;
+ volatile stm32_usb_pma_t RXADDR0;
/**
* @brief RX counter register 0.
*/
- volatile uint16_t RXCOUNT0;
- /**
- * @brief RX counter register 1.
- */
- volatile uint16_t RXCOUNT1;
+ volatile stm32_usb_pma_t RXCOUNT0;
} stm32_usb_descriptor_t;
/**
* @name Register aliases
* @{
*/
-#define RXADDR1 TXADDR0
-#define TXADDR1 RXADDR0
+#define RXADDR1 TXADDR0
+#define TXADDR1 RXADDR0
/** @} */
/**
@@ -139,12 +142,7 @@ typedef struct {
/**
* @brief Pointer to the USB RAM.
*/
-#define STM32_USBRAM ((uint32_t *)STM32_USBRAM_BASE)
-
-/**
- * @brief Size of the dedicated packet memory.
- */
-#define USB_PMA_SIZE 512
+#define STM32_USBRAM ((stm32_usb_pma_t *)STM32_USBRAM_BASE)
/**
* @brief Mask of all the toggling bits in the EPR register.
@@ -252,7 +250,9 @@ typedef struct {
* @brief Converts from a PMA address to a physical address.
*/
#define USB_ADDR2PTR(addr) \
- ((uint32_t *)((addr) * 2 + STM32_USBRAM_BASE))
+ ((stm32_usb_pma_t *)((addr) * \
+ (sizeof(stm32_usb_pma_t) / 2) + \
+ STM32_USBRAM_BASE))
#endif /* _STM32_USB_H_ */
diff --git a/os/hal/ports/STM32/LLD/USBv1/usb_lld.c b/os/hal/ports/STM32/LLD/USBv1/usb_lld.c
index e606dc390..ac8c2189f 100644
--- a/os/hal/ports/STM32/LLD/USBv1/usb_lld.c
+++ b/os/hal/ports/STM32/LLD/USBv1/usb_lld.c
@@ -111,7 +111,7 @@ static uint32_t usb_pm_alloc(USBDriver *usbp, size_t size) {
next = usbp->pmnext;
usbp->pmnext += size;
- osalDbgAssert(usbp->pmnext <= USB_PMA_SIZE, "PMA overflow");
+ osalDbgAssert(usbp->pmnext <= STM32_USB_PMA_SIZE, "PMA overflow");
return next;
}
@@ -127,7 +127,7 @@ static uint32_t usb_pm_alloc(USBDriver *usbp, size_t size) {
*/
static void usb_packet_read_to_buffer(stm32_usb_descriptor_t *udp,
uint8_t *buf, size_t n) {
- uint32_t *pmap= USB_ADDR2PTR(udp->RXADDR0);
+ stm32_usb_pma_t *pmap= USB_ADDR2PTR(udp->RXADDR0);
n = (n + 1) / 2;
while (n > 0) {
@@ -152,11 +152,11 @@ static void usb_packet_read_to_buffer(stm32_usb_descriptor_t *udp,
static void usb_packet_read_to_queue(stm32_usb_descriptor_t *udp,
input_queue_t *iqp, size_t n) {
size_t nhw;
- uint32_t *pmap= USB_ADDR2PTR(udp->RXADDR0);
+ stm32_usb_pma_t *pmap= USB_ADDR2PTR(udp->RXADDR0);
nhw = n / 2;
while (nhw > 0) {
- uint32_t w;
+ stm32_usb_pma_t w;
w = *pmap++;
*iqp->q_wrptr++ = (uint8_t)w;
@@ -196,14 +196,14 @@ static void usb_packet_read_to_queue(stm32_usb_descriptor_t *udp,
static void usb_packet_write_from_buffer(stm32_usb_descriptor_t *udp,
const uint8_t *buf,
size_t n) {
- uint32_t *pmap = USB_ADDR2PTR(udp->TXADDR0);
+ stm32_usb_pma_t *pmap = USB_ADDR2PTR(udp->TXADDR0);
- udp->TXCOUNT0 = (uint16_t)n;
+ udp->TXCOUNT0 = (stm32_usb_pma_t)n;
n = (n + 1) / 2;
while (n > 0) {
/* Note, this line relies on the Cortex-M3/M4 ability to perform
unaligned word accesses.*/
- *pmap++ = *(uint16_t *)buf;
+ *pmap++ = (stm32_usb_pma_t)*(const uint16_t *)buf;
buf += 2;
n--;
}
@@ -223,17 +223,17 @@ static void usb_packet_write_from_queue(stm32_usb_descriptor_t *udp,
output_queue_t *oqp, size_t n) {
size_t nhw;
syssts_t sts;
- uint32_t *pmap = USB_ADDR2PTR(udp->TXADDR0);
+ stm32_usb_pma_t *pmap = USB_ADDR2PTR(udp->TXADDR0);
- udp->TXCOUNT0 = (uint16_t)n;
+ udp->TXCOUNT0 = (stm32_usb_pma_t)n;
nhw = n / 2;
while (nhw > 0) {
- uint32_t w;
+ stm32_usb_pma_t w;
- w = (uint32_t)*oqp->q_rdptr++;
+ w = (stm32_usb_pma_t)*oqp->q_rdptr++;
if (oqp->q_rdptr >= oqp->q_top)
oqp->q_rdptr = oqp->q_buffer;
- w |= (uint32_t)*oqp->q_rdptr++ << 8;
+ w |= (stm32_usb_pma_t)*oqp->q_rdptr++ << 8;
if (oqp->q_rdptr >= oqp->q_top)
oqp->q_rdptr = oqp->q_buffer;
*pmap++ = w;
@@ -242,7 +242,7 @@ static void usb_packet_write_from_queue(stm32_usb_descriptor_t *udp,
/* Last byte for odd numbers.*/
if ((n & 1) != 0) {
- *pmap = (uint32_t)*oqp->q_rdptr++;
+ *pmap = (stm32_usb_pma_t)*oqp->q_rdptr++;
if (oqp->q_rdptr >= oqp->q_top)
oqp->q_rdptr = oqp->q_buffer;
}
@@ -662,7 +662,7 @@ usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep) {
* @notapi
*/
void usb_lld_read_setup(USBDriver *usbp, usbep_t ep, uint8_t *buf) {
- uint32_t *pmap;
+ stm32_usb_pma_t *pmap;
stm32_usb_descriptor_t *udp;
uint32_t n;
diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.c b/os/hal/ports/STM32/STM32F0xx/hal_lld.c
index 7cc925c70..88ef442b7 100644
--- a/os/hal/ports/STM32/STM32F0xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.c
@@ -185,8 +185,8 @@ void stm32_clock_init(void) {
RCC->CFGR = STM32_MCOSEL | STM32_PLLMUL | STM32_PLLSRC |
STM32_ADCPRE | STM32_PPRE | STM32_HPRE;
RCC->CFGR2 = STM32_PREDIV;
- RCC->CFGR3 = STM32_ADCSW | STM32_CECSW | STM32_I2C1SW |
- STM32_USART1SW;
+ RCC->CFGR3 = STM32_ADCSW | STM32_USBSW | STM32_CECSW |
+ STM32_I2C1SW | STM32_USART1SW;
#if STM32_ACTIVATE_PLL
/* PLL activation.*/
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index 0745791ba..64c328f88 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -195,6 +195,8 @@
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || \
defined(STM32F078xx)
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 TRUE
+#define STM32_USB_PMA_SIZE 768
#define STM32_USB_HAS_BCDR TRUE
#else
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F1xx/stm32_registry.h b/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
index 474bf1332..71867783d 100644
--- a/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
@@ -582,6 +582,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -757,6 +759,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -932,6 +936,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_registry.h b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
index e0a38489a..d389d621a 100644
--- a/os/hal/ports/STM32/STM32F37x/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
@@ -206,6 +206,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -384,6 +386,8 @@
/* USB attributes.*/
#define STM32_HAS_USB FALSE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
#endif /* defined(STM32F378xx) */
diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
index b60a40dc6..cad6026b5 100644
--- a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
@@ -204,6 +204,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -659,6 +661,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -823,6 +827,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -974,6 +980,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -1287,6 +1295,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
index b9e811dd8..2a687ccc4 100644
--- a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
@@ -178,6 +178,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE
@@ -334,6 +336,8 @@
/* USB attributes.*/
#define STM32_HAS_USB TRUE
+#define STM32_USB_ACCESS_SCHEME_2x16 FALSE
+#define STM32_USB_PMA_SIZE 512
#define STM32_USB_HAS_BCDR FALSE
#define STM32_HAS_OTG1 FALSE
#define STM32_HAS_OTG2 FALSE