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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-03-03 15:08:54 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-03-03 15:08:54 +0000 |
| commit | 880d6916b3fb25b3972ed78b380db630524623e7 (patch) | |
| tree | 9f57ae70320f161adcb84b75ed8870754190016e /os/hal/ports | |
| parent | e2d1dd382a9739c2c9b970f32167d1ae12d2f499 (diff) | |
| download | ChibiOS-880d6916b3fb25b3972ed78b380db630524623e7.tar.gz ChibiOS-880d6916b3fb25b3972ed78b380db630524623e7.tar.bz2 ChibiOS-880d6916b3fb25b3972ed78b380db630524623e7.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7713 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports')
| -rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h index 78e4cdf5c..6165530c4 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h @@ -44,33 +44,33 @@ * @name STM32-specific I/O mode flags
* @{
*/
-#define PAL_STM32_MODE_MASK (3 << 0)
-#define PAL_STM32_MODE_INPUT (0 << 0)
-#define PAL_STM32_MODE_OUTPUT (1 << 0)
-#define PAL_STM32_MODE_ALTERNATE (2 << 0)
-#define PAL_STM32_MODE_ANALOG (3 << 0)
-
-#define PAL_STM32_OTYPE_MASK (1 << 2)
-#define PAL_STM32_OTYPE_PUSHPULL (0 << 2)
-#define PAL_STM32_OTYPE_OPENDRAIN (1 << 2)
-
-#define PAL_STM32_OSPEED_MASK (3 << 3)
-#define PAL_STM32_OSPEED_LOWEST (0 << 3)
+#define PAL_STM32_MODE_MASK (3U << 0U)
+#define PAL_STM32_MODE_INPUT (0U << 0U)
+#define PAL_STM32_MODE_OUTPUT (1U << 0U)
+#define PAL_STM32_MODE_ALTERNATE (2U << 0U)
+#define PAL_STM32_MODE_ANALOG (3U << 0U)
+
+#define PAL_STM32_OTYPE_MASK (1U << 2U)
+#define PAL_STM32_OTYPE_PUSHPULL (0U << 2U)
+#define PAL_STM32_OTYPE_OPENDRAIN (1U << 2U)
+
+#define PAL_STM32_OSPEED_MASK (3U << 3U)
+#define PAL_STM32_OSPEED_LOWEST (0U << 3U)
#if defined(STM32F0XX) || defined(STM32F30X) || defined(STM32F37X)
-#define PAL_STM32_OSPEED_MID (1 << 3)
+#define PAL_STM32_OSPEED_MID (1U << 3U)
#else
-#define PAL_STM32_OSPEED_MID1 (1 << 3)
-#define PAL_STM32_OSPEED_MID2 (2 << 3)
+#define PAL_STM32_OSPEED_MID1 (1U << 3U)
+#define PAL_STM32_OSPEED_MID2 (2U << 3U)
#endif
-#define PAL_STM32_OSPEED_HIGHEST (3 << 3)
+#define PAL_STM32_OSPEED_HIGHEST (3U << 3U)
-#define PAL_STM32_PUDR_MASK (3 << 5)
-#define PAL_STM32_PUDR_FLOATING (0 << 5)
-#define PAL_STM32_PUDR_PULLUP (1 << 5)
-#define PAL_STM32_PUDR_PULLDOWN (2 << 5)
+#define PAL_STM32_PUDR_MASK (3U << 5U)
+#define PAL_STM32_PUDR_FLOATING (0U << 5U)
+#define PAL_STM32_PUDR_PULLUP (1U << 5U)
+#define PAL_STM32_PUDR_PULLDOWN (2U << 5U)
-#define PAL_STM32_ALTERNATE_MASK (15 << 7)
-#define PAL_STM32_ALTERNATE(n) ((n) << 7)
+#define PAL_STM32_ALTERNATE_MASK (15U << 7U)
+#define PAL_STM32_ALTERNATE(n) ((n) << 7U)
/**
* @brief Alternate function.
@@ -441,7 +441,7 @@ typedef stm32_gpio_t * ioportid_t; * @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) \
- ((port)->BSRR.W = ((~(bits) & (mask)) << (16 + (offset))) | \
+ ((port)->BSRR.W = ((~(bits) & (mask)) << (16U + (offset))) | \
(((bits) & (mask)) << (offset)))
/**
|