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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-09-12 13:33:12 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-09-12 13:33:12 +0000 |
commit | 232ae706e91fb0113591dab7116965c7c2b09351 (patch) | |
tree | 0678c9f172f87085b8f4e13b5274ac34c0d12430 /os/hal/ports/STM32 | |
parent | 7404ce9c286b2a6076d4e8a290b6276ce422cc38 (diff) | |
download | ChibiOS-232ae706e91fb0113591dab7116965c7c2b09351.tar.gz ChibiOS-232ae706e91fb0113591dab7116965c7c2b09351.tar.bz2 ChibiOS-232ae706e91fb0113591dab7116965c7c2b09351.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6295 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32')
-rw-r--r-- | os/hal/ports/STM32/TIMv1/st_lld.c | 79 | ||||
-rw-r--r-- | os/hal/ports/STM32/TIMv1/st_lld.h | 41 |
2 files changed, 74 insertions, 46 deletions
diff --git a/os/hal/ports/STM32/TIMv1/st_lld.c b/os/hal/ports/STM32/TIMv1/st_lld.c index 8e4a4e84e..a8b858e8c 100644 --- a/os/hal/ports/STM32/TIMv1/st_lld.c +++ b/os/hal/ports/STM32/TIMv1/st_lld.c @@ -31,26 +31,45 @@ /* The following checks and settings are unusually done here because the
file st.h needs to not have external dependencies. In this case there
would be a dependency on osal.h and mcuconf.h.*/
-#if !defined(HAL_ST_USE_TIM5)
+#if STM32_ST_USE_TIMER == 2
+#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM2_IS_32BITS
+#error "TIM2 is not a 32bits timer"
+#endif
+
+#define ST_HANDLER STM32_TIM2_HANDLER
+#define ST_NUMBER STM32_TIM2_NUMBER
+#define ST_ENABLE_CLOCK() rccEnableTIM2(FALSE)
-#if !STM32_HAS_TIM2
-#error "TIM2 not present in the selected device"
+#elif STM32_ST_USE_TIMER == 5
+#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM5_IS_32BITS
+#error "TIM5 is not a 32bits timer"
#endif
-#if !STM32_TIM2_IS_32BITS
-#error "TIM2 is not a 32 bits timer"
+#define ST_HANDLER STM32_TIM5_HANDLER
+#define ST_NUMBER STM32_TIM5_NUMBER
+#define ST_ENABLE_CLOCK() rccEnableTIM5(FALSE)
+
+#elif STM32_ST_USE_TIMER == 6
+#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM6_IS_32BITS
+#error "TIM6 is not a 32bits timer"
#endif
-#else /* defined(HAL_ST_USE_TIM5) */
+#define ST_HANDLER STM32_TIM6_HANDLER
+#define ST_NUMBER STM32_TIM6_NUMBER
+#define ST_ENABLE_CLOCK() rccEnableTIM6(FALSE)
-#if !STM32_HAS_TIM5
-#error "TIM5 not present in the selected device"
+#elif STM32_ST_USE_TIMER == 7
+#if (OSAL_ST_RESOLUTION == 32) && !STM32_TIM7_IS_32BITS
+#error "TIM7 is not a 32bits timer"
#endif
-#if !STM32_TIM5_IS_32BITS
-#error "TIM5 is not a 32 bits timer"
+#define ST_HANDLER STM32_TIM7_HANDLER
+#define ST_NUMBER STM32_TIM7_NUMBER
+#define ST_ENABLE_CLOCK() rccEnableTIM7(FALSE)
+
+#else
+#error "STM32_ST_USE_TIMER specifies an unsupported timer"
#endif
-#endif /* defined(HAL_ST_USE_TIM5) */
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
@@ -116,15 +135,11 @@ OSAL_IRQ_HANDLER(SysTick_Handler) { *
* @isr
*/
-#if !defined(HAL_ST_USE_TIM5)
-OSAL_IRQ_HANDLER(STM32_TIM2_HANDLER) {
-#else
-OSAL_IRQ_HANDLER(STM32_TIM5_HANDLER) {
-#endif
+OSAL_IRQ_HANDLER(ST_HANDLER) {
OSAL_IRQ_PROLOGUE();
- ST_TIM->SR = 0;
+ STM32_ST_TIM->SR = 0;
osalSysLockFromISR();
osalOsTimerHandlerI();
@@ -147,28 +162,22 @@ void st_lld_init(void) { #if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
/* Free running counter mode.*/
-#if !defined(HAL_ST_USE_TIM5)
- rccEnableTIM2(FALSE);
-#else
- rccEnableTIM5(FALSE);
-#endif
+
+ /* Enabling timer clock.*/
+ ST_ENABLE_CLOCK();
/* Initializing the counter in free running mode.*/
- ST_TIM->PSC = STM32_TIMCLK1 / OSAL_SYSTICK_FREQUENCY - 1;
- ST_TIM->ARR = 0xFFFFFFFF;
- ST_TIM->CCMR1 = 0;
- ST_TIM->CCR[0] = 0;
- ST_TIM->DIER = 0;
- ST_TIM->CR2 = 0;
- ST_TIM->EGR = TIM_EGR_UG;
- ST_TIM->CR1 = TIM_CR1_CEN;
+ STM32_ST_TIM->PSC = STM32_TIMCLK1 / OSAL_SYSTICK_FREQUENCY - 1;
+ STM32_ST_TIM->ARR = 0xFFFFFFFF;
+ STM32_ST_TIM->CCMR1 = 0;
+ STM32_ST_TIM->CCR[0] = 0;
+ STM32_ST_TIM->DIER = 0;
+ STM32_ST_TIM->CR2 = 0;
+ STM32_ST_TIM->EGR = TIM_EGR_UG;
+ STM32_ST_TIM->CR1 = TIM_CR1_CEN;
/* IRQ enabled.*/
-#if !defined(HAL_ST_USE_TIM5)
- nvicEnableVector(STM32_TIM2_NUMBER, STM32_ST_IRQ_PRIORITY);
-#else
- nvicEnableVector(STM32_TIM5_NUMBER, STM32_ST_IRQ_PRIORITY);
-#endif
+ nvicEnableVector(ST_NUMBER, STM32_ST_IRQ_PRIORITY);
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
diff --git a/os/hal/ports/STM32/TIMv1/st_lld.h b/os/hal/ports/STM32/TIMv1/st_lld.h index 4a969738c..0013d7913 100644 --- a/os/hal/ports/STM32/TIMv1/st_lld.h +++ b/os/hal/ports/STM32/TIMv1/st_lld.h @@ -38,14 +38,33 @@ /* Driver pre-compile time settings. */
/*===========================================================================*/
+/**
+ * @brief TIMx unit (by number) to be used for free running operations.
+ * @note You must select a 32 bits timer if a 32 bits systick_t is
+ * required.
+ */
+#if !defined(STM32_ST_USE_TIMER) || defined(__DOXYGEN__)
+#define STM32_ST_USE_TIMER 2
+#endif
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
-#if !defined(HAL_ST_USE_TIM5)
-#define ST_TIM STM32_TIM2
+#if STM32_ST_USE_TIMER == 2
+#define STM32_ST_TIM STM32_TIM2
+
+#elif STM32_ST_USE_TIMER == 5
+#define STM32_ST_TIM STM32_TIM5
+
+#elif STM32_ST_USE_TIMER == 6
+#define STM32_ST_TIM STM32_TIM6
+
+#elif STM32_ST_USE_TIMER == 7
+#define STM32_ST_TIM STM32_TIM7
+
#else
-#define ST_TIM STM32_TIM5
+#error "STM32_ST_USE_TIMER specifies an unsupported timer"
#endif
/*===========================================================================*/
@@ -81,7 +100,7 @@ extern "C" { */
static inline systime_t st_lld_get_counter(void) {
- return (systime_t)(ST_TIM->CNT);
+ return (systime_t)STM32_ST_TIM->CNT;
}
/**
@@ -95,9 +114,9 @@ static inline systime_t st_lld_get_counter(void) { */
static inline void st_lld_start_alarm(systime_t time) {
- ST_TIM->CCR[0] = time;
- ST_TIM->SR = 0;
- ST_TIM->DIER = STM32_TIM_DIER_CC1IE;
+ STM32_ST_TIM->CCR[0] = (uint32_t)time;
+ STM32_ST_TIM->SR = 0;
+ STM32_ST_TIM->DIER = STM32_TIM_DIER_CC1IE;
}
/**
@@ -107,7 +126,7 @@ static inline void st_lld_start_alarm(systime_t time) { */
static inline void st_lld_stop_alarm(void) {
- ST_TIM->DIER = 0;
+ STM32_ST_TIM->DIER = 0;
}
/**
@@ -119,7 +138,7 @@ static inline void st_lld_stop_alarm(void) { */
static inline void st_lld_set_alarm(systime_t time) {
- ST_TIM->CCR[0] = (uint32_t)time;
+ STM32_ST_TIM->CCR[0] = (uint32_t)time;
}
/**
@@ -131,7 +150,7 @@ static inline void st_lld_set_alarm(systime_t time) { */
static inline systime_t st_lld_get_alarm(void) {
- return (systime_t)ST_TIM->CCR[0];
+ return (systime_t)STM32_ST_TIM->CCR[0];
}
/**
@@ -145,7 +164,7 @@ static inline systime_t st_lld_get_alarm(void) { */
static inline bool st_lld_is_alarm_active(void) {
- return (bool)((ST_TIM->DIER & STM32_TIM_DIER_CC1IE) != 0);
+ return (bool)((STM32_ST_TIM->DIER & STM32_TIM_DIER_CC1IE) != 0);
}
#endif /* _ST_LLD_H_ */
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