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author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-17 14:55:12 +0000 |
---|---|---|
committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-17 14:55:12 +0000 |
commit | c953aa5ac86e4f913c41333a773a0903e0860d35 (patch) | |
tree | d2c00d4f0eaf25892e5d4f4ade85b2866e2c38de /os/hal/ports/STM32/STM32L1xx/stm32_rcc.h | |
parent | df330879bb5c5630e847e2e9eec471080b0d18a4 (diff) | |
download | ChibiOS-c953aa5ac86e4f913c41333a773a0903e0860d35.tar.gz ChibiOS-c953aa5ac86e4f913c41333a773a0903e0860d35.tar.bz2 ChibiOS-c953aa5ac86e4f913c41333a773a0903e0860d35.zip |
Defaulted all STM32 drivers to enable peripheral clocks during stop/sleep modes. Now RCC macros are able to set or clear the LP bit of a peripheral.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11300 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32L1xx/stm32_rcc.h')
-rw-r--r-- | os/hal/ports/STM32/STM32L1xx/stm32_rcc.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h index 989735afd..8593aca9d 100644 --- a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h @@ -63,6 +63,8 @@ RCC->APB1ENR |= (mask); \
if (lp) \
RCC->APB1LPENR |= (mask); \
+ else \
+ RCC->APB1LPENR &= ~(mask); \
}
/**
@@ -74,7 +76,6 @@ */
#define rccDisableAPB1(mask) { \
RCC->APB1ENR &= ~(mask); \
- RCC->APB1LPENR &= ~(mask); \
}
/**
@@ -101,6 +102,8 @@ RCC->APB2ENR |= (mask); \
if (lp) \
RCC->APB2LPENR |= (mask); \
+ else \
+ RCC->APB2LPENR &= ~(mask); \
}
/**
@@ -112,7 +115,6 @@ */
#define rccDisableAPB2(mask) { \
RCC->APB2ENR &= ~(mask); \
- RCC->APB2LPENR &= ~(mask); \
}
/**
@@ -139,6 +141,8 @@ RCC->AHBENR |= (mask); \
if (lp) \
RCC->AHBLPENR |= (mask); \
+ else \
+ RCC->AHBLPENR &= ~(mask); \
}
/**
@@ -150,7 +154,6 @@ */
#define rccDisableAHB(mask) { \
RCC->AHBENR &= ~(mask); \
- RCC->AHBLPENR &= ~(mask); \
}
/**
|