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authorGiovanni Di Sirio <gdisirio@gmail.com>2017-03-26 12:37:54 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2017-03-26 12:37:54 +0000
commita072acd8bc362c079f3d2b9869954858f8092ea7 (patch)
tree1f0a134a91c2d9c6176e88cfd28d66fbdce4f263 /os/hal/ports/STM32/STM32L0xx
parent5acf1106551fd474f98458f68704acb599b02da8 (diff)
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Fixed bug #819.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10130 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32L0xx')
-rw-r--r--os/hal/ports/STM32/STM32L0xx/hal_lld.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
index 843e66dff..24d8a8107 100644
--- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
@@ -269,7 +269,7 @@
#define STM32_LPTIM1SEL_MASK (3 << 18) /**< LPTIM1 clock source mask. */
#define STM32_LPTIM1SEL_APB (0 << 18) /**< LPTIM1 clock is APB. */
-#define STM32_LPTIM1SEL_SYSCLK (1 << 18) /**< LPTIM1 clock is SYSCLK. */
+#define STM32_LPTIM1SEL_LSI (1 << 18) /**< LPTIM1 clock is LSI. */
#define STM32_LPTIM1SEL_HSI16 (2 << 18) /**< LPTIM1 clock is HSI16. */
#define STM32_LPTIM1SEL_LSE (3 << 18) /**< LPTIM1 clock is LSE. */