diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-07-07 08:24:50 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-07-07 08:24:50 +0000 |
| commit | 8a0cfa1ce2cfb15d6bd1bc7492beb86c55656d0a (patch) | |
| tree | a3bedabfa260b3d3522ddf6f6daff3465bdec762 /os/hal/ports/STM32/STM32L0xx | |
| parent | 18f021db303aa9b1d70c4efa1aaa53699118e577 (diff) | |
| download | ChibiOS-8a0cfa1ce2cfb15d6bd1bc7492beb86c55656d0a.tar.gz ChibiOS-8a0cfa1ce2cfb15d6bd1bc7492beb86c55656d0a.tar.bz2 ChibiOS-8a0cfa1ce2cfb15d6bd1bc7492beb86c55656d0a.zip | |
Fixed bug #953.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12131 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports/STM32/STM32L0xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32L0xx/stm32_rcc.h | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h index 2e4462ae9..510ecb6dc 100644 --- a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h @@ -65,6 +65,7 @@ RCC->APB1SMENR |= (mask); \
else \
RCC->APB1SMENR &= ~(mask); \
+ (void)RCC->APB1SMENR; \
}
/**
@@ -76,6 +77,8 @@ */
#define rccDisableAPB1(mask) { \
RCC->APB1ENR &= ~(mask); \
+ RCC->APB1SMENR &= ~(mask); \
+ (void)RCC->APB1SMENR; \
}
/**
@@ -87,7 +90,8 @@ */
#define rccResetAPB1(mask) { \
RCC->APB1RSTR |= (mask); \
- RCC->APB1RSTR = 0; \
+ RCC->APB1RSTR &= ~(mask); \
+ (void)RCC->APB1RSTR; \
}
/**
@@ -104,6 +108,7 @@ RCC->APB2SMENR |= (mask); \
else \
RCC->APB2SMENR &= ~(mask); \
+ (void)RCC->APB2SMENR; \
}
/**
@@ -115,6 +120,8 @@ */
#define rccDisableAPB2(mask) { \
RCC->APB2ENR &= ~(mask); \
+ RCC->APB2SMENR &= ~(mask); \
+ (void)RCC->APB2SMENR; \
}
/**
@@ -126,7 +133,8 @@ */
#define rccResetAPB2(mask) { \
RCC->APB2RSTR |= (mask); \
- RCC->APB2RSTR = 0; \
+ RCC->APB2RSTR &= ~(mask); \
+ (void)RCC->APB2RSTR; \
}
/**
@@ -143,6 +151,7 @@ RCC->AHBSMENR |= (mask); \
else \
RCC->AHBSMENR &= ~(mask); \
+ (void)RCC->AHBSMENR; \
}
/**
@@ -154,6 +163,8 @@ */
#define rccDisableAHB(mask) { \
RCC->AHBENR &= ~(mask); \
+ RCC->AHBSMENR &= ~(mask); \
+ (void)RCC->AHBSMENR; \
}
/**
@@ -165,7 +176,8 @@ */
#define rccResetAHB(mask) { \
RCC->AHBRSTR |= (mask); \
- RCC->AHBRSTR = 0; \
+ RCC->AHBRSTR &= ~(mask); \
+ (void)RCC->AHBRSTR; \
}
/**
@@ -182,6 +194,7 @@ RCC->IOPSMENR |= (mask); \
else \
RCC->IOPSMENR &= ~(mask); \
+ (void)RCC->IOPSMENR; \
}
/**
@@ -193,6 +206,8 @@ */
#define rccDisableIOP(mask) { \
RCC->IOPENR &= ~(mask); \
+ RCC->IOPSMENR &= ~(mask); \
+ (void)RCC->IOPSMENR; \
}
/**
@@ -204,7 +219,8 @@ */
#define rccResetIOP(mask) { \
RCC->IOPRSTR |= (mask); \
- RCC->IOPRSTR = 0; \
+ RCC->IOPRSTR &= ~(mask); \
+ (void)RCC->IOPRSTR; \
}
/** @} */
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