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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-05-23 16:01:05 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-05-23 16:01:05 +0000 |
| commit | 055f0a587ad0f2a84ef53b500dff7b5e637a41aa (patch) | |
| tree | 55646bc938c6bf386c3335482c2f969b44fdbb6f /os/hal/ports/STM32/STM32L0xx | |
| parent | 4b7feac57b56e5ac49d5370388ce790ebc42a176 (diff) | |
| download | ChibiOS-055f0a587ad0f2a84ef53b500dff7b5e637a41aa.tar.gz ChibiOS-055f0a587ad0f2a84ef53b500dff7b5e637a41aa.tar.bz2 ChibiOS-055f0a587ad0f2a84ef53b500dff7b5e637a41aa.zip | |
Fixed Bug #741
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9502 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32L0xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32L0xx/hal_lld.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h index 21c5f2584..bd295856b 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h @@ -1021,7 +1021,7 @@ /**
* @brief USART1 frequency.
*/
-#if (STM32_USART1SEL == STM32_USART1SEL_APB) || defined(__DOXYGEN)
+#if (STM32_USART1SEL == STM32_USART1SEL_APB) || defined(__DOXYGEN__)
#define STM32_USART1CLK STM32_PCLK2
#elif STM32_USART1SEL == STM32_USART1SEL_SYSCLK
#define STM32_USART1CLK STM32_SYSCLK
@@ -1036,7 +1036,7 @@ /**
* @brief USART2 frequency.
*/
-#if (STM32_USART2SEL == STM32_USART2SEL_APB) || defined(__DOXYGEN)
+#if (STM32_USART2SEL == STM32_USART2SEL_APB) || defined(__DOXYGEN__)
#define STM32_USART2CLK STM32_PCLK1
#elif STM32_USART2SEL == STM32_USART2SEL_SYSCLK
#define STM32_USART2CLK STM32_SYSCLK
@@ -1051,7 +1051,7 @@ /**
* @brief LPUART1 frequency.
*/
-#if (STM32_LPUART1SEL == STM32_LPUART1SEL_APB) || defined(__DOXYGEN)
+#if (STM32_LPUART1SEL == STM32_LPUART1SEL_APB) || defined(__DOXYGEN__)
#define STM32_LPUART1CLK STM32_PCLK1
#elif STM32_LPUART1SEL == STM32_LPUART1SEL_SYSCLK
#define STM32_LPUART1CLK STM32_SYSCLK
@@ -1066,7 +1066,7 @@ /**
* @brief I2C1 frequency.
*/
-#if (STM32_I2C1SEL == STM32_I2C1SEL_APB) || defined(__DOXYGEN)
+#if (STM32_I2C1SEL == STM32_I2C1SEL_APB) || defined(__DOXYGEN__)
#define STM32_I2C1CLK STM32_PCLK1
#elif STM32_I2C1SEL == STM32_I2C1SEL_SYSCLK
#define STM32_I2C1CLK STM32_SYSCLK
@@ -1079,7 +1079,7 @@ /**
* @brief LPTIM1 frequency.
*/
-#if (STM32_LPTIM1SEL == STM32_LPTIM1SEL_APB) || defined(__DOXYGEN)
+#if (STM32_LPTIM1SEL == STM32_LPTIM1SEL_APB) || defined(__DOXYGEN__)
#define STM32_LPTIM1CLK STM32_PCLK1
#elif STM32_LPTIM1SEL == STM32_LPTIM1SEL_SYSCLK
#define STM32_LPTIM1CLK STM32_SYSCLK
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