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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-19 10:13:44 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-19 10:13:44 +0000
commit52d583ec3b89f04d4daa3688026bde568315b64c (patch)
tree702e34ad1844b0dd89047360e1da3b08abe31131 /os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
parent78ebf73dcdc6aa09b6f255ac53ceafffa62422c4 (diff)
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Fixed #912.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11343 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32H7xx/stm32_rcc.h')
-rw-r--r--os/hal/ports/STM32/STM32H7xx/stm32_rcc.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
index b258f79b1..ce5650c70 100644
--- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h
@@ -890,6 +890,29 @@
* @api
*/
#define rccResetSDMMC1() rccResetAHB3(RCC_AHB3RSTR_SDMMC1RST)
+
+/**
+ * @brief Enables the SDMMC2 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableSDMMC2(lp) rccEnableAHB3(RCC_AHB3ENR_SDMMC2EN, lp)
+
+/**
+ * @brief Disables the SDMMC2 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableSDMMC2() rccDisableAHB3(RCC_AHB3ENR_SDMMC2EN)
+
+/**
+ * @brief Resets the SDMMC2 peripheral.
+ *
+ * @api
+ */
+#define rccResetSDMMC2() rccResetAHB3(RCC_AHB3RSTR_SDMMC2RST)
/** @} */
/**