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authorGiovanni Di Sirio <gdisirio@gmail.com>2017-12-26 09:10:43 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2017-12-26 09:10:43 +0000
commitc7f42d1d7175654fab88ad59e44898379d07516e (patch)
tree197f01a356848008366b4be17fdaf9215adc2247 /os/hal/ports/STM32/STM32H7xx/hal_lld.c
parenteb4d8034884b2093b322deb165227135c534ebb4 (diff)
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Added clock sources for timers and more CFGR settings.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11186 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32H7xx/hal_lld.c')
-rw-r--r--os/hal/ports/STM32/STM32H7xx/hal_lld.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.c b/os/hal/ports/STM32/STM32H7xx/hal_lld.c
index e1f93a6ff..acf8047fb 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.c
@@ -157,6 +157,8 @@ void hal_lld_init(void) {
* @special
*/
void stm32_clock_init(void) {
+ uint32_t cfgr;
+
#if 0
RCC_TypeDef *rcc = RCC; /* For inspection.*/
(void)rcc;
@@ -197,9 +199,14 @@ void stm32_clock_init(void) {
/* Other clock-related settings, done before other things because
recommended in the RM.*/
- RCC->CFGR = STM32_MCO2SEL | RCC_CFGR_MCO2PRE_VALUE(STM32_MCO2PRE_VALUE) |
- STM32_MCO1SEL | RCC_CFGR_MCO1PRE_VALUE(STM32_MCO1PRE_VALUE) |
- RCC_CFGR_RTCPRE_VALUE(STM32_RTCPRE_VALUE);
+ cfgr = STM32_MCO2SEL | RCC_CFGR_MCO2PRE_VALUE(STM32_MCO2PRE_VALUE) |
+ STM32_MCO1SEL | RCC_CFGR_MCO1PRE_VALUE(STM32_MCO1PRE_VALUE) |
+ RCC_CFGR_RTCPRE_VALUE(STM32_RTCPRE_VALUE) |
+ STM32_HRTIMSEL | STM32_STOPKERWUCK | STM32_STOPWUCK;
+#if STM32_TIMPRE_ENABLE == TRUE
+ cfgr |= RCC_CFGR_TIMPRE;
+#endif
+ RCC->CFGR = cfgr;
/* HSE activation with optional bypass.*/
#if STM32_HSE_ENABLED == TRUE