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authorGiovanni Di Sirio <gdisirio@gmail.com>2016-05-26 12:57:35 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2016-05-26 12:57:35 +0000
commit6f7ae6af72328f41ed3156206a7af738719fe9c8 (patch)
tree8eb2847307013565b463e7fe0a0e1ea54a9ecd54 /os/hal/ports/STM32/STM32F7xx/stm32_registry.h
parentd22d4c839e7438786d23921641bdabffac4dd247 (diff)
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QUADSPI settings in all registries and platform.mk.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9535 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F7xx/stm32_registry.h')
-rw-r--r--os/hal/ports/STM32/STM32F7xx/stm32_registry.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
index de8a14fd4..225a6aba5 100644
--- a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
@@ -215,6 +215,13 @@
#define STM32_I2C4_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
#define STM32_I2C4_TX_DMA_CHN 0x00200000
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 TRUE
+#define STM32_QUADSPI1_HANDLER Vector1B0
+#define STM32_QUADSPI1_NUMBER 92
+#define STM32_QUADSPI1_DMA_MSK STM32_DMA_STREAM_ID_MSK(2, 7)
+#define STM32_QUADSPI1_DMA_CHN 0x30000000
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE