diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-12 15:13:56 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-12 15:13:56 +0000 |
| commit | a23a891953e5c2cd96f2ba067c5c1661fd0c76b8 (patch) | |
| tree | 1b3bc0e9871f6ccafa44aa6a19b35c6b88b971d0 /os/hal/ports/STM32/STM32F7xx/hal_lld.h | |
| parent | dc3bc84a7168edd0b36f5eed12d4e712c10144b4 (diff) | |
| download | ChibiOS-a23a891953e5c2cd96f2ba067c5c1661fd0c76b8.tar.gz ChibiOS-a23a891953e5c2cd96f2ba067c5c1661fd0c76b8.tar.bz2 ChibiOS-a23a891953e5c2cd96f2ba067c5c1661fd0c76b8.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8472 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F7xx/hal_lld.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F7xx/hal_lld.h | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h index 2bfa75978..9272adb96 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h @@ -1493,16 +1493,16 @@ * @brief MCO1 divider clock.
*/
#if (STM32_MCO1SEL == STM32_MCO1SEL_HSI) || defined(__DOXYGEN__)
-#define STM32_MCO1DIVCLK STM32_HSICLK
+#define STM32_MCO1DIVCLK STM32_HSICLK
#elif STM32_MCO1SEL == STM32_MCO1SEL_LSE
-#define STM32_MCO1DIVCLK STM32_LSECLK
+#define STM32_MCO1DIVCLK STM32_LSECLK
#elif STM32_MCO1SEL == STM32_MCO1SEL_HSE
-#define STM32_MCO1DIVCLK STM32_HSECLK
+#define STM32_MCO1DIVCLK STM32_HSECLK
#elif STM32_MCO1SEL == STM32_MCO1SEL_PLL
-#define STM32_MCO1DIVCLK STM32_PLL_P_CLKOUT
+#define STM32_MCO1DIVCLK STM32_PLL_P_CLKOUT
#else
#error "invalid STM32_MCO1SEL value specified"
@@ -1512,19 +1512,19 @@ * @brief MCO1 output pin clock.
*/
#if (STM32_MCO1PRE == STM32_MCO1PRE_DIV1) || defined(__DOXYGEN__)
-#define STM32_MCO1CLK STM32_MCO1DIVCLK
+#define STM32_MCO1CLK STM32_MCO1DIVCLK
#elif STM32_MCO1PRE == STM32_MCO1PRE_DIV2
-#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 2)
+#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 2)
#elif STM32_MCO1PRE == STM32_MCO1PRE_DIV3
-#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 3)
+#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 3)
#elif STM32_MCO1PRE == STM32_MCO1PRE_DIV4
-#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 4)
+#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 4)
#elif STM32_MCO1PRE == STM32_MCO1PRE_DIV5
-#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 5)
+#define STM32_MCO1CLK (STM32_MCO1DIVCLK / 5)
#else
#error "invalid STM32_MCO1PRE value specified"
@@ -1534,16 +1534,16 @@ * @brief MCO2 divider clock.
*/
#if (STM32_MCO2SEL == STM32_MCO2SEL_HSE) || defined(__DOXYGEN__)
-#define STM32_MCO2DIVCLK STM32_HSECLK
+#define STM32_MCO2DIVCLK STM32_HSECLK
#elif STM32_MCO2SEL == STM32_MCO2SEL_PLL
-#define STM32_MCO2DIVCLK STM32_PLL_P_CLKOUT
+#define STM32_MCO2DIVCLK STM32_PLL_P_CLKOUT
#elif STM32_MCO2SEL == STM32_MCO2SEL_SYSCLK
-#define STM32_MCO2DIVCLK STM32_SYSCLK
+#define STM32_MCO2DIVCLK STM32_SYSCLK
#elif STM32_MCO2SEL == STM32_MCO2SEL_PLLI2S
-#define STM32_MCO2DIVCLK STM32_PLLI2S
+#define STM32_MCO2DIVCLK STM32_PLLI2S
#else
#error "invalid STM32_MCO2SEL value specified"
@@ -1553,19 +1553,19 @@ * @brief MCO2 output pin clock.
*/
#if (STM32_MCO2PRE == STM32_MCO2PRE_DIV1) || defined(__DOXYGEN__)
-#define STM32_MCO2CLK STM32_MCO2DIVCLK
+#define STM32_MCO2CLK STM32_MCO2DIVCLK
#elif STM32_MCO2PRE == STM32_MCO2PRE_DIV2
-#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 2)
+#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 2)
#elif STM32_MCO2PRE == STM32_MCO2PRE_DIV3
-#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 3)
+#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 3)
#elif STM32_MCO2PRE == STM32_MCO2PRE_DIV4
-#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 4)
+#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 4)
#elif STM32_MCO2PRE == STM32_MCO2PRE_DIV5
-#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 5)
+#define STM32_MCO2CLK (STM32_MCO2DIVCLK / 5)
#else
#error "invalid STM32_MCO2PRE value specified"
|