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authorGiovanni Di Sirio <gdisirio@gmail.com>2017-09-02 09:00:49 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2017-09-02 09:00:49 +0000
commit4c39135c94232e76011da8a055dd3eddd0031da2 (patch)
treeee76d10993619a10aa18a413f264c67ac935b1ba /os/hal/ports/STM32/STM32F7xx/hal_lld.c
parent0701f98135282457b20aef073b00e1f0cdda0c92 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10525 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F7xx/hal_lld.c')
-rw-r--r--os/hal/ports/STM32/STM32F7xx/hal_lld.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
index 09bb780a6..8f5645b88 100644
--- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
@@ -123,10 +123,14 @@ void hal_lld_init(void) {
/* Initializes the backup domain.*/
hal_lld_backup_domain_init();
+ /* DMA subsystems initialization.*/
#if defined(STM32_DMA_REQUIRED)
dmaInit();
#endif
+ /* IRQ subsystem initialization.*/
+ irqInit();
+
#if STM32_SRAM2_NOCACHE
/* The SRAM2 bank can optionally made a non cache-able area for use by
DMA engines.*/