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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-27 10:37:43 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-27 10:37:43 +0000 |
| commit | bc6b6552fe403b4af4dc36d619cb18b4ea5edaef (patch) | |
| tree | 5ce69d48d71cfcb15af7f1e8aed18492ea17fc0b /os/hal/ports/STM32/STM32F4xx | |
| parent | ed72edd29fda227a14c7392d2e8eee2f5a034ab6 (diff) | |
| download | ChibiOS-bc6b6552fe403b4af4dc36d619cb18b4ea5edaef.tar.gz ChibiOS-bc6b6552fe403b4af4dc36d619cb18b4ea5edaef.tar.bz2 ChibiOS-bc6b6552fe403b4af4dc36d619cb18b4ea5edaef.zip | |
Fixed TIMPRE behavior.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12059 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/hal_lld.h | 8 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_registry.h | 11 |
2 files changed, 14 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/hal_lld.h b/os/hal/ports/STM32/STM32F4xx/hal_lld.h index 1456029e2..4b05135e1 100644 --- a/os/hal/ports/STM32/STM32F4xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F4xx/hal_lld.h @@ -221,8 +221,8 @@ #else /* STM32_HAS_RCC_DCKCFGR && (STM32_TIMPRE == STM32_TIMPRE_HCLK) */
#if (STM32_PPRE1 == STM32_PPRE1_DIV1) || \
(STM32_PPRE1 == STM32_PPRE1_DIV2) || \
- (STM32_PPRE1 == STM32_PPRE1_DIV4) || \
- defined(__DOXYGEN__)
+ ((STM32_PPRE1 == STM32_PPRE1_DIV4) && \
+ (STM32_TIMPRE_PRESCALE4 == TRUE)) || defined(__DOXYGEN__)
#define STM32_TIMCLK1 STM32_HCLK
#else
#define STM32_TIMCLK1 (STM32_PCLK1 * 4)
@@ -230,8 +230,8 @@ #if (STM32_PPRE2 == STM32_PPRE2_DIV1) || \
(STM32_PPRE2 == STM32_PPRE2_DIV2) || \
- (STM32_PPRE2 == STM32_PPRE2_DIV4) || \
- defined(__DOXYGEN__)
+ ((STM32_PPRE2 == STM32_PPRE2_DIV4) && \
+ (STM32_TIMPRE_PRESCALE4 == TRUE)) || defined(__DOXYGEN__)
#define STM32_TIMCLK2 STM32_HCLK
#else
#define STM32_TIMCLK2 (STM32_PCLK2 * 4)
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h index fe7ce9bb9..97dab1f85 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h @@ -92,12 +92,13 @@ /* Clock tree attributes.*/
#define STM32_HAS_RCC_PLLSAI TRUE
#define STM32_HAS_RCC_PLLI2S TRUE
-#define STM32_HAS_RCC_DCKCFGR TRU§E
+#define STM32_HAS_RCC_DCKCFGR TRUE
#define STM32_HAS_RCC_DCKCFGR2 FALSE
#define STM32_HAS_RCC_I2SSRC TRUE
#define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
+#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -479,6 +480,7 @@ #define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
+#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -837,6 +839,7 @@ #define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
+#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -1214,6 +1217,7 @@ #define STM32_HAS_RCC_I2SPLLSRC TRUE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S TRUE
+#define STM32_TIMPRE_PRESCALE4 TRUE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -1603,6 +1607,7 @@ #define STM32_HAS_RCC_I2SPLLSRC TRUE
#define STM32_HAS_RCC_CK48MSEL TRUE
#define STM32_RCC_CK48MSEL_USES_I2S TRUE
+#define STM32_TIMPRE_PRESCALE4 TRUE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -1937,6 +1942,7 @@ #define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
+#define STM32_TIMPRE_PRESCALE4 TRUE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -2247,6 +2253,7 @@ #define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
+#define STM32_TIMPRE_PRESCALE4 TRUE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -2527,6 +2534,7 @@ #define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
+#define STM32_TIMPRE_PRESCALE4 FALSE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
@@ -2880,6 +2888,7 @@ #define STM32_HAS_RCC_I2SPLLSRC FALSE
#define STM32_HAS_RCC_CK48MSEL FALSE
#define STM32_RCC_CK48MSEL_USES_I2S FALSE
+#define STM32_TIMPRE_PRESCALE4 TRUE
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
|