aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports/STM32/STM32F4xx
diff options
context:
space:
mode:
authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-08 09:45:28 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-08 09:45:28 +0000
commitb865ac52b98c05547f8a2b29bfd029105365512b (patch)
treeaf3664da2fcbb0755732c496f16a4db169b512f8 /os/hal/ports/STM32/STM32F4xx
parent287e6cdd2c593c2b6cff4be0de624b251a4b8bff (diff)
downloadChibiOS-b865ac52b98c05547f8a2b29bfd029105365512b.tar.gz
ChibiOS-b865ac52b98c05547f8a2b29bfd029105365512b.tar.bz2
ChibiOS-b865ac52b98c05547f8a2b29bfd029105365512b.zip
Undid some changes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11237 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx')
-rw-r--r--os/hal/ports/STM32/STM32F4xx/stm32_registry.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
index cf0438fcc..8d663aef7 100644
--- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
@@ -130,6 +130,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -498,6 +501,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -841,6 +847,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -1191,6 +1200,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -1511,6 +1523,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -1809,6 +1824,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -2086,6 +2104,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -2420,6 +2441,9 @@
#define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_CACHE_HANDLING FALSE
+
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70