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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-08-05 08:00:56 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-08-05 08:00:56 +0000 |
| commit | 88a09ec74105c34e3eb66eb5ba84f0e448ce7a2a (patch) | |
| tree | fe8ade2bad038927e12d26ee9e39222dc974fa27 /os/hal/ports/STM32/STM32F4xx | |
| parent | adb00b4f8f7d34b0fa026bc8fc083e3464d6c32a (diff) | |
| download | ChibiOS-88a09ec74105c34e3eb66eb5ba84f0e448ce7a2a.tar.gz ChibiOS-88a09ec74105c34e3eb66eb5ba84f0e448ce7a2a.tar.bz2 ChibiOS-88a09ec74105c34e3eb66eb5ba84f0e448ce7a2a.zip | |
Added FSMC NAND driver
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7123 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/platform.mk | 4 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_rcc.h | 29 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_registry.h | 12 |
3 files changed, 44 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/platform.mk b/os/hal/ports/STM32/STM32F4xx/platform.mk index c9b74b45c..00dd5ccb4 100644 --- a/os/hal/ports/STM32/STM32F4xx/platform.mk +++ b/os/hal/ports/STM32/STM32F4xx/platform.mk @@ -20,7 +20,9 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/TIMv1/st_lld.c \
${CHIBIOS}/os/hal/ports/STM32/LLD/USARTv1/serial_lld.c \
- ${CHIBIOS}/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c
+ ${CHIBIOS}/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c \
+ ${CHIBIOS}/os/hal/ports/STM32/LLD/emc_lld.c \
+ ${CHIBIOS}/os/hal/ports/STM32/LLD/emcnand_lld.c
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h index 5d66fffa5..fa9fe14bd 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h @@ -1382,6 +1382,35 @@ * @api
*/
#define rccResetLTDC() rccResetAPB2(RCC_APB2RSTR_LTDCRST)
+
+/**
+ * @name FSMC peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief Enables the FSMS peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableFSMC(lp) rccEnableAHB3(RCC_AHB3ENR_FSMCEN, lp)
+
+/**
+ * @brief Disables the FSMC peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FSMCEN, lp)
+
+/**
+ * @brief Resets the FSMC peripheral.
+ *
+ * @api
+ */
+#define rccResetFSMC() rccResetAHB3(RCC_AHB3RSTR_FSMCRST)
/** @} */
/*===========================================================================*/
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h index 78a8d783a..816ae0353 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h @@ -325,6 +325,18 @@ #else /* defined(STM32F401xx) */
#define STM32_HAS_OTG2 FALSE
#endif /* defined(STM32F401xx) */
+
+/* EMC attributes.*/
+#define STM32_HAS_EMC TRUE
+#define STM32_EMC_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) | \
+ STM32_DMA_STREAM_ID_MSK(2, 1) | \
+ STM32_DMA_STREAM_ID_MSK(2, 2) | \
+ STM32_DMA_STREAM_ID_MSK(2, 3) | \
+ STM32_DMA_STREAM_ID_MSK(2, 4) | \
+ STM32_DMA_STREAM_ID_MSK(2, 5) | \
+ STM32_DMA_STREAM_ID_MSK(2, 6) | \
+ STM32_DMA_STREAM_ID_MSK(2, 7))
+#define STM32_EMC_DMA_CHN 0x03010201
/** @} */
#endif /* _STM32_REGISTRY_H_ */
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