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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-08 08:58:34 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-08 08:58:34 +0000 |
| commit | 7761387ba0a0ac206b7e5ab133462c29882b63bd (patch) | |
| tree | 158722e03054fb8b5727ff27dc5aae28eef13ce8 /os/hal/ports/STM32/STM32F4xx | |
| parent | 4148fb3cb7dcbe3eeef998bf6d0a86a1ad2447da (diff) | |
| download | ChibiOS-7761387ba0a0ac206b7e5ab133462c29882b63bd.tar.gz ChibiOS-7761387ba0a0ac206b7e5ab133462c29882b63bd.tar.bz2 ChibiOS-7761387ba0a0ac206b7e5ab133462c29882b63bd.zip | |
Added unified cache handler for Cortex-M devices.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11233 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_registry.h | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h index 8d663aef7..cf0438fcc 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h @@ -130,9 +130,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -501,9 +498,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -847,9 +841,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -1200,9 +1191,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -1523,9 +1511,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -1824,9 +1809,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -2104,9 +2086,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
@@ -2441,9 +2420,6 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA TRUE
-#define STM32_DMA_CACHE_HANDLING FALSE
-
#define STM32_HAS_DMA1 TRUE
#define STM32_DMA1_CH0_HANDLER Vector6C
#define STM32_DMA1_CH1_HANDLER Vector70
|