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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-05-11 09:09:49 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-05-11 09:09:49 +0000
commit233d1b74163238bd313b6d4bfeb3c10d520d5c66 (patch)
tree7fa4ec74f6cfc4c26e81cd8483b0b71cc14dc54a /os/hal/ports/STM32/STM32F4xx
parenteaeabaf3c27132ce4ed48e948f0d7ccc39ca8487 (diff)
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Added RCC capabilities to STM32F4 registry, clock trees in the family are too different from each other and need a deeper logic.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12018 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx')
-rw-r--r--os/hal/ports/STM32/STM32F4xx/stm32_registry.h45
1 files changed, 45 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
index b8048770d..3557b3d79 100644
--- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
@@ -89,6 +89,11 @@
#if defined(STM32F469_479xx) || defined(__DOXYGEN__)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL TRUE
+#define STM32_HAS_RCC_I2CPLL TRUE
+#define STM32_HAS_RCC_CK48MSEL TRUE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -460,6 +465,11 @@
#if defined(STM32F446xx)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL TRUE
+#define STM32_HAS_RCC_I2CPLL TRUE
+#define STM32_HAS_RCC_CK48MSEL TRUE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -806,6 +816,11 @@
#if defined(STM32F429_439xx) || defined(STM32F427_437xx)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL TRUE
+#define STM32_HAS_RCC_I2CPLL TRUE
+#define STM32_HAS_RCC_CK48MSEL FALSE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -1173,6 +1188,11 @@
#if defined(STM32F413xx)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL FALSE
+#define STM32_HAS_RCC_I2CPLL TRUE
+#define STM32_HAS_RCC_CK48MSEL TRUE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -1546,6 +1566,11 @@
#if defined(STM32F412xx)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL FALSE
+#define STM32_HAS_RCC_I2CPLL TRUE
+#define STM32_HAS_RCC_CK48MSEL TRUE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -1870,6 +1895,11 @@
#if defined(STM32F411xx)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL FALSE
+#define STM32_HAS_RCC_I2CPLL TRUE
+#define STM32_HAS_RCC_CK48MSEL FALSE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -2168,6 +2198,11 @@
#if defined(STM32F410xx)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL FALSE
+#define STM32_HAS_RCC_I2CPLL FALSE
+#define STM32_HAS_RCC_CK48MSEL FALSE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -2436,6 +2471,11 @@
#if defined(STM32F40_41xxx) || defined(STM32F2XX)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL FALSE
+#define STM32_HAS_RCC_I2CPLL TRUE
+#define STM32_HAS_RCC_CK48MSEL FALSE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18
@@ -2779,6 +2819,11 @@
#if defined(STM32F401xx)
+/* Clock tree attributes.*/
+#define STM32_HAS_RCC_SAIPLL FALSE
+#define STM32_HAS_RCC_I2CPLL FALSE
+#define STM32_HAS_RCC_CK48MSEL FALSE
+
/* ADC attributes.*/
#define STM32_ADC_HANDLER Vector88
#define STM32_ADC_NUMBER 18