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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-11-18 11:36:01 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-11-18 11:36:01 +0000 |
| commit | 9913d1b6ffb81eccdc2c28ae9041872237195856 (patch) | |
| tree | 8bce3b60e49b7e1281efec99c3c582b06f2be029 /os/hal/ports/STM32/STM32F4xx/stm32_registry.h | |
| parent | 7c77845aa765b51b4026749bc4439bb100cc722a (diff) | |
| download | ChibiOS-9913d1b6ffb81eccdc2c28ae9041872237195856.tar.gz ChibiOS-9913d1b6ffb81eccdc2c28ae9041872237195856.tar.bz2 ChibiOS-9913d1b6ffb81eccdc2c28ae9041872237195856.zip | |
Changes to RTCv2 driver, not finished yet.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12433 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx/stm32_registry.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_registry.h | 33 |
1 files changed, 23 insertions, 10 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h index 0e1799bd3..46135aa89 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h @@ -189,7 +189,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -572,7 +572,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -934,7 +934,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -1303,7 +1303,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -1688,7 +1688,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -2023,7 +2023,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -2338,7 +2338,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -2639,7 +2639,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
@@ -2699,7 +2699,20 @@ #endif
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector49
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 21
+#define STM32_RTC_WKUP_EXTI 22
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI21_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI22_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO TRUE
@@ -2981,7 +2994,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0x00000000U
+#define STM32_EXTI_IMR1_MASK 0x00000000U
/* GPIO attributes.*/
#define STM32_HAS_GPIOA TRUE
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