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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-16 09:23:21 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-11-16 09:23:21 +0000 |
| commit | f8dc1b4a805d998320328d4be13471e20482dee4 (patch) | |
| tree | e648ca1a1de0ebd57b563251b9fdf59cc103c534 /os/hal/ports/STM32/STM32F4xx/stm32_rcc.h | |
| parent | 1409bd15bd3bfa57c042caaed6d4b755e23ca235 (diff) | |
| download | ChibiOS-f8dc1b4a805d998320328d4be13471e20482dee4.tar.gz ChibiOS-f8dc1b4a805d998320328d4be13471e20482dee4.tar.bz2 ChibiOS-f8dc1b4a805d998320328d4be13471e20482dee4.zip | |
FSMC. Added FMC support in rcc and registry files. This changes needed for community FSMC code functioning.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7512 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx/stm32_rcc.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_rcc.h | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h index 431b9ce24..1543481f7 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h @@ -1388,13 +1388,17 @@ * @{
*/
/**
- * @brief Enables the FSMS peripheral clock.
+ * @brief Enables the FSMC peripheral clock.
*
* @param[in] lp low power enable flag
*
* @api
*/
-#define rccEnableFSMC(lp) rccEnableAHB3(RCC_AHB3ENR_FSMCEN, lp)
+#if defined(STM32_FSMC_IS_FMC)
+ #define rccEnableFSMC(lp) rccEnableAHB3(RCC_AHB3ENR_FMCEN, lp)
+#else
+ #define rccEnableFSMC(lp) rccEnableAHB3(RCC_AHB3ENR_FSMCEN, lp)
+#endif
/**
* @brief Disables the FSMC peripheral clock.
@@ -1403,14 +1407,22 @@ *
* @api
*/
-#define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FSMCEN, lp)
+#if defined(STM32_FSMC_IS_FMC)
+ #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FMCEN, lp)
+#else
+ #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FSMCEN, lp)
+#endif
/**
* @brief Resets the FSMC peripheral.
*
* @api
*/
-#define rccResetFSMC() rccResetAHB3(RCC_AHB3RSTR_FSMCRST)
+#if defined(STM32_FSMC_IS_FMC)
+ #define rccResetFSMC() rccResetAHB3(RCC_AHB3RSTR_FMCRST)
+#else
+ #define rccResetFSMC() rccResetAHB3(RCC_AHB3RSTR_FSMCRST)
+#endif
/** @} */
/*===========================================================================*/
|