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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-06 13:26:44 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-06 13:26:44 +0000 |
| commit | 5605e7420d98386fbb53be09a685f65735d55dde (patch) | |
| tree | 1e979d5dedea6166f59604788a8419ad89465228 /os/hal/ports/STM32/STM32F4xx/stm32_rcc.h | |
| parent | f8cb6e81eae24a2e2ddd5249a4cce4cfb1a9b52a (diff) | |
| download | ChibiOS-5605e7420d98386fbb53be09a685f65735d55dde.tar.gz ChibiOS-5605e7420d98386fbb53be09a685f65735d55dde.tar.bz2 ChibiOS-5605e7420d98386fbb53be09a685f65735d55dde.zip | |
Fixed bug #612.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8172 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F4xx/stm32_rcc.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/stm32_rcc.h | 90 |
1 files changed, 72 insertions, 18 deletions
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h index b86c85d58..ba29fa1d2 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h @@ -1359,24 +1359,6 @@ #define rccResetUSART3() rccResetAPB1(RCC_APB1RSTR_USART3RST)
/**
- * @brief Enables the USART6 peripheral clock.
- *
- * @param[in] lp low power enable flag
- *
- * @api
- */
-#define rccEnableUSART6(lp) rccEnableAPB2(RCC_APB2ENR_USART6EN, lp)
-
-/**
- * @brief Disables the USART6 peripheral clock.
- *
- * @param[in] lp low power enable flag
- *
- * @api
- */
-#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp)
-
-/**
* @brief Enables the UART4 peripheral clock.
* @note The @p lp parameter is ignored in this family.
*
@@ -1431,11 +1413,83 @@ #define rccResetUART5() rccResetAPB1(RCC_APB1RSTR_UART5RST)
/**
+ * @brief Enables the USART6 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUSART6(lp) rccEnableAPB2(RCC_APB2ENR_USART6EN, lp)
+
+/**
+ * @brief Disables the USART6 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp)
+
+/**
* @brief Resets the USART6 peripheral.
*
* @api
*/
#define rccResetUSART6() rccResetAPB2(RCC_APB2RSTR_USART6RST)
+
+/**
+ * @brief Enables the UART7 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUART7(lp) rccEnableAPB1(RCC_APB1ENR_UART7EN, lp)
+
+/**
+ * @brief Disables the UART7 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUART7(lp) rccDisableAPB1(RCC_APB1ENR_UART7EN, lp)
+
+/**
+ * @brief Resets the UART7 peripheral.
+ *
+ * @api
+ */
+#define rccResetUART7() rccResetAPB1(RCC_APB1RSTR_UART7RST)
+
+/**
+ * @brief Enables the UART8 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUART8(lp) rccEnableAPB1(RCC_APB1ENR_UART8EN, lp)
+
+/**
+ * @brief Disables the UART8 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUART8(lp) rccDisableAPB1(RCC_APB1ENR_UART8EN, lp)
+
+/**
+ * @brief Resets the UART8 peripheral.
+ *
+ * @api
+ */
+#define rccResetUART8() rccResetAPB1(RCC_APB1RSTR_UART8RST)
/** @} */
/**
|