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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-05-26 12:57:35 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-05-26 12:57:35 +0000 |
| commit | 6f7ae6af72328f41ed3156206a7af738719fe9c8 (patch) | |
| tree | 8eb2847307013565b463e7fe0a0e1ea54a9ecd54 /os/hal/ports/STM32/STM32F3xx | |
| parent | d22d4c839e7438786d23921641bdabffac4dd247 (diff) | |
| download | ChibiOS-6f7ae6af72328f41ed3156206a7af738719fe9c8.tar.gz ChibiOS-6f7ae6af72328f41ed3156206a7af738719fe9c8.tar.bz2 ChibiOS-6f7ae6af72328f41ed3156206a7af738719fe9c8.zip | |
QUADSPI settings in all registries and platform.mk.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9535 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F3xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F3xx/stm32_registry.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h index 3fea891eb..815a74354 100644 --- a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h @@ -164,6 +164,9 @@ #define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -428,6 +431,9 @@ #define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -672,6 +678,9 @@ #define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -885,6 +894,9 @@ #define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1095,6 +1107,9 @@ #define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1322,6 +1337,9 @@ #define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1568,6 +1586,9 @@ #define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1798,6 +1819,9 @@ #define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -2012,6 +2036,9 @@ #define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -2238,6 +2265,9 @@ #define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -2469,6 +2499,9 @@ #define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -2710,6 +2743,9 @@ #define STM32_HAS_I2C4 FALSE
+/* QUADSPI attributes.*/
+#define STM32_HAS_QUADSPI1 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
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