diff options
| author | gdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01> | 2018-11-25 15:12:23 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01> | 2018-11-25 15:12:23 +0000 |
| commit | f24c09b778d1103a345cb94b2d57c3e76fb5a681 (patch) | |
| tree | 7cb8e38c56074a7ecb3a7c19adbf11e63da819d2 /os/hal/ports/STM32/STM32F3xx/stm32_registry.h | |
| parent | 6268914b7c6eac2a8ee04b2f9d4c270fc5363dee (diff) | |
| download | ChibiOS-f24c09b778d1103a345cb94b2d57c3e76fb5a681.tar.gz ChibiOS-f24c09b778d1103a345cb94b2d57c3e76fb5a681.tar.bz2 ChibiOS-f24c09b778d1103a345cb94b2d57c3e76fb5a681.zip | |
RTC changes for F3.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12440 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports/STM32/STM32F3xx/stm32_registry.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F3xx/stm32_registry.h | 228 |
1 files changed, 200 insertions, 28 deletions
diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h index c1b793e85..ecaa8cf09 100644 --- a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h @@ -33,10 +33,6 @@ #endif
/*===========================================================================*/
-/* Common features. */
-/*===========================================================================*/
-
-/*===========================================================================*/
/* Platform capabilities. */
/*===========================================================================*/
@@ -44,6 +40,14 @@ * @name STM32F3xx capabilities
* @{
*/
+
+/*===========================================================================*/
+/* Common. */
+/*===========================================================================*/
+
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/*===========================================================================*/
/* STM32F303xC. */
/*===========================================================================*/
@@ -133,7 +137,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 34
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -174,7 +178,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -396,7 +414,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 34
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -443,7 +461,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -653,7 +685,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 33
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -691,7 +723,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -865,7 +911,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 33
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -909,7 +955,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1080,7 +1140,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 33
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -1124,7 +1184,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1314,7 +1388,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 34
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -1356,7 +1430,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1560,7 +1648,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 34
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -1607,7 +1695,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1799,7 +1901,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 33
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -1842,7 +1944,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -2023,7 +2139,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 33
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -2061,7 +2177,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -2250,7 +2380,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 34
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -2292,7 +2422,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -2490,7 +2634,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 33
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -2528,7 +2672,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 1
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -2730,7 +2888,7 @@ /* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 34
-#define STM32_EXTI_IMR_MASK 0x1F800000U
+#define STM32_EXTI_IMR1_MASK 0x1F800000U
#define STM32_EXTI_IMR2_MASK 0xFFFFFFFCU
/* GPIO attributes.*/
@@ -2777,7 +2935,21 @@ #define STM32_RTC_HAS_SUBSECONDS TRUE
#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
+#define STM32_RTC_STORAGE_SIZE 64
+#define STM32_RTC_TAMP_STAMP_HANDLER Vector48
+#define STM32_RTC_WKUP_HANDLER Vector4C
+#define STM32_RTC_ALARM_HANDLER VectorE4
+#define STM32_RTC_TAMP_STAMP_NUMBER 2
+#define STM32_RTC_WKUP_NUMBER 3
+#define STM32_RTC_ALARM_NUMBER 41
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() do { \
+ nvicEnableVector(STM32_RTC_TAMP_STAMP_NUMBER, STM32_IRQ_EXTI19_PRIORITY); \
+ nvicEnableVector(STM32_RTC_WKUP_NUMBER, STM32_IRQ_EXTI20_PRIORITY); \
+ nvicEnableVector(STM32_RTC_ALARM_NUMBER, STM32_IRQ_EXTI17_PRIORITY); \
+} while (false)
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
|