Defaulted all STM32 drivers to enable peripheral clocks during stop/sleep modes. Now RCC macros are able to set or clear the LP bit of a peripheral.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11300 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 4 insertions, 4 deletions

diff --git a/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c b/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c
index 8bd671d58..92e79b9a5 100644
--- a/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c
+++ b/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c
@@ -99,7 +99,7 @@ void adc_lld_init(void) {
                   STM32_DMA_CR_TEIE;

 

   /* Temporary activation.*/

-  rccEnableADC1(false);

+  rccEnableADC1(true);

   ADC1->CR1 = 0;

   ADC1->CR2 = ADC_CR2_ADON;

 

@@ -139,7 +139,7 @@ void adc_lld_start(ADCDriver *adcp) {
                             (void *)adcp);

       osalDbgAssert(!b, "stream already allocated");

       dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);

-      rccEnableADC1(false);

+      rccEnableADC1(true);

     }

 #endif

 

diff --git a/os/hal/ports/STM32/STM32F1xx/hal_lld.c b/os/hal/ports/STM32/STM32F1xx/hal_lld.c
index 711335004..80fac7bbb 100644
--- a/os/hal/ports/STM32/STM32F1xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F1xx/hal_lld.c
@@ -136,8 +136,8 @@ void hal_lld_init(void) {
   rccResetAPB2(0xFFFFFFFF);

 

   /* PWR and BD clocks enabled.*/

-  rccEnablePWRInterface(FALSE);

-  rccEnableBKPInterface(FALSE);

+  rccEnablePWRInterface(true);

+  rccEnableBKPInterface(true);

 

   /* Initializes the backup domain.*/

   hal_lld_backup_domain_init();