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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-09-24 13:40:29 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-09-24 13:40:29 +0000 |
| commit | 0b7d7ef92ae89c9fb09215e0228e7b6d28b1210e (patch) | |
| tree | 0eff40f38d934e7a7357b0387323dab6ef5d1551 /os/hal/ports/STM32/STM32F1xx | |
| parent | f5d1988830352e3c6aa8dc63bcf542683d48c0e7 (diff) | |
| download | ChibiOS-0b7d7ef92ae89c9fb09215e0228e7b6d28b1210e.tar.gz ChibiOS-0b7d7ef92ae89c9fb09215e0228e7b6d28b1210e.tar.bz2 ChibiOS-0b7d7ef92ae89c9fb09215e0228e7b6d28b1210e.zip | |
Fixed Bug #779.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9789 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F1xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F1xx/hal_lld_f105_f107.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/os/hal/ports/STM32/STM32F1xx/hal_lld_f105_f107.h b/os/hal/ports/STM32/STM32F1xx/hal_lld_f105_f107.h index f61512fe3..ce4ae3c6d 100644 --- a/os/hal/ports/STM32/STM32F1xx/hal_lld_f105_f107.h +++ b/os/hal/ports/STM32/STM32F1xx/hal_lld_f105_f107.h @@ -403,10 +403,11 @@ #endif
#if (STM32_MCOSEL == STM32_MCOSEL_HSE) || \
- ((STM32_MCOSEL == STM32_MCOSEL_PLLDIV2) && \
- (STM32_PLLSRC == STM32_PLLSRC_HSE)) || \
- (STM32_MCOSEL == STM32_MCOSEL_PLL2DIV2) || \
- (STM32_MCOSEL == STM32_MCOSEL_PLL3DIV2) || \
+ (((STM32_MCOSEL == STM32_MCOSEL_PLLDIV2) || \
+ (STM32_MCOSEL == STM32_MCOSEL_PLL2) || \
+ (STM32_MCOSEL == STM32_MCOSEL_PLL3) || \
+ (STM32_MCOSEL == STM32_MCOSEL_PLL3DIV2)) && \
+ (STM32_PLLSRC == STM32_PLLSRC_HSE)) || \
(STM32_MCOSEL == STM32_MCOSEL_XT1)
#error "HSE not enabled, required by STM32_MCOSEL"
#endif
@@ -465,8 +466,7 @@ /* PLL2 activation conditions.*/
#if ((STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2) && STM32_ACTIVATE_PLL1) || \
- (STM32_MCOSEL == STM32_MCOSEL_PLL2DIV2) || \
- defined(__DOXYGEN__)
+ (STM32_MCOSEL == STM32_MCOSEL_PLL2) || defined(__DOXYGEN__)
/**
* @brief PLL2 activation flag.
*/
|