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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-09-02 10:18:15 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-09-02 10:18:15 +0000 |
| commit | 7f5380a8a5f9f9e8a39b59d6896ef9c79cc7a0f9 (patch) | |
| tree | c50a347ba44e4d451e654a8686b006da9832b88b /os/hal/ports/STM32/STM32F1xx/stm32_isr.h | |
| parent | 4c39135c94232e76011da8a055dd3eddd0031da2 (diff) | |
| download | ChibiOS-7f5380a8a5f9f9e8a39b59d6896ef9c79cc7a0f9.tar.gz ChibiOS-7f5380a8a5f9f9e8a39b59d6896ef9c79cc7a0f9.tar.bz2 ChibiOS-7f5380a8a5f9f9e8a39b59d6896ef9c79cc7a0f9.zip | |
PAL callbacks added to STM32F103
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10526 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F1xx/stm32_isr.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F1xx/stm32_isr.h | 93 |
1 files changed, 92 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32F1xx/stm32_isr.h b/os/hal/ports/STM32/STM32F1xx/stm32_isr.h index e0ea4ec25..c39c4ecca 100644 --- a/os/hal/ports/STM32/STM32F1xx/stm32_isr.h +++ b/os/hal/ports/STM32/STM32F1xx/stm32_isr.h @@ -16,7 +16,7 @@ /**
* @file STM32F1xx/stm32_isr.h
- * @brief ISR remapper driver header.
+ * @brief STM32F3xx ISR handler header.
*
* @addtogroup STM32F1xx_ISR
* @{
@@ -142,6 +142,88 @@ /* Driver pre-compile time settings. */
/*===========================================================================*/
+/**
+ * @name Configuration options
+ * @{
+ */
+/**
+ * @brief EXTI0 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI0_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI0_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI1 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI1_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI1_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI2 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI2_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI2_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI3 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI3_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI3_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI4 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI4_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI4_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI9..5 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI5_9_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI5_9_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI15..10 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI10_15_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI10_15_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI16 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI16_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI16_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI17 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI17_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI17_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI18 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI18_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI18_PRIORITY 6
+#endif
+
+/**
+ * @brief EXTI19 interrupt priority level setting.
+ */
+#if !defined(STM32_IRQ_EXTI19_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_IRQ_EXTI19_PRIORITY 6
+#endif
+/** @} */
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -158,6 +240,15 @@ /* External declarations. */
/*===========================================================================*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void irqInit(void);
+ void irqDeinit(void);
+#ifdef __cplusplus
+}
+#endif
+
#endif /* STM32_ISR_H */
/** @} */
|