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authorGiovanni Di Sirio <gdisirio@gmail.com>2017-02-23 10:06:45 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2017-02-23 10:06:45 +0000
commit3c720a33274170db6e6c99a612a936bb2e094484 (patch)
treedab381b417880e90a25b346aa47be50d1c364c23 /os/hal/ports/STM32/STM32F1xx/hal_lld.c
parent4140ae5815ee4b963d0cf2ae82d545567abd7121 (diff)
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LSE bypass implemented on STM32F1xx.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10110 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F1xx/hal_lld.c')
-rw-r--r--os/hal/ports/STM32/STM32F1xx/hal_lld.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32F1xx/hal_lld.c b/os/hal/ports/STM32/STM32F1xx/hal_lld.c
index 950eb3b5a..3893d6e70 100644
--- a/os/hal/ports/STM32/STM32F1xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F1xx/hal_lld.c
@@ -66,7 +66,13 @@ static void hal_lld_backup_domain_init(void) {
/* If enabled then the LSE is started.*/
#if STM32_LSE_ENABLED
+#if defined(STM32_LSE_BYPASS)
+ /* LSE Bypass.*/
+ RCC->BDCR |= RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
+#else
+ /* No LSE Bypass.*/
RCC->BDCR |= RCC_BDCR_LSEON;
+#endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */
#endif /* STM32_LSE_ENABLED */