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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-07-29 12:55:15 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-07-29 12:55:15 +0000 |
| commit | 20bd48025885d03ae1ecc46bb9f8f2f1fa952630 (patch) | |
| tree | e26a9792c8eca1af42cad3ec6f27a13f375a5286 /os/hal/ports/STM32/STM32F0xx | |
| parent | ade92163ac1dc1fe5c8930495c5e591696a349b9 (diff) | |
| download | ChibiOS-20bd48025885d03ae1ecc46bb9f8f2f1fa952630.tar.gz ChibiOS-20bd48025885d03ae1ecc46bb9f8f2f1fa952630.tar.bz2 ChibiOS-20bd48025885d03ae1ecc46bb9f8f2f1fa952630.zip | |
More detailed settings for DMAv1 driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8128 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F0xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/stm32_registry.h | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h index 35e64026c..6cad2dff0 100644 --- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h @@ -72,7 +72,8 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@@ -281,7 +282,8 @@ /* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 7
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@@ -501,7 +503,8 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@@ -688,7 +691,8 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@@ -863,7 +867,8 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@@ -1046,7 +1051,8 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
@@ -1246,7 +1252,8 @@ #define STM32_HAS_DAC2_CH2 FALSE
/* DMA attributes.*/
-#define STM32_ADVANCED_DMA FALSE
+#define STM32_ADVANCED_DMA TRUE
+#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 5
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
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