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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-07-29 08:59:55 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-07-29 08:59:55 +0000 |
| commit | bbacae2118c4c05a477d93ec0aa356e63442f6e2 (patch) | |
| tree | be5ee5fffaa63bf025c28bbd2f18781a10221616 /os/hal/ports/STM32/STM32F0xx/hal_lld.h | |
| parent | b0b485d70c2a0f38a785103ea1d1181e755e2dad (diff) | |
| download | ChibiOS-bbacae2118c4c05a477d93ec0aa356e63442f6e2.tar.gz ChibiOS-bbacae2118c4c05a477d93ec0aa356e63442f6e2.tar.bz2 ChibiOS-bbacae2118c4c05a477d93ec0aa356e63442f6e2.zip | |
Aligned mcuconf.h files for STM32F0xx devices. Removed obsolete settings, added DMA remapping settings.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8125 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F0xx/hal_lld.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/hal_lld.h | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.h b/os/hal/ports/STM32/STM32F0xx/hal_lld.h index f15fb5173..d376efe95 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h @@ -154,11 +154,6 @@ * @brief Maximum APB clock frequency.
*/
#define STM32_PCLK_MAX 48000000
-
-/**
- * @brief Maximum ADC clock frequency.
- */
-#define STM32_ADCCLK_MAX 14000000
/** @} */
/**
@@ -403,20 +398,6 @@ #endif
/**
- * @brief ADC prescaler value.
- */
-#if !defined(STM32_ADCPRE) || defined(__DOXYGEN__)
-#define STM32_ADCPRE STM32_ADCPRE_DIV4
-#endif
-
-/**
- * @brief ADC clock source.
- */
-#if !defined(STM32_ADCSW) || defined(__DOXYGEN__)
-#define STM32_ADCSW STM32_ADCSW_HSI14
-#endif
-
-/**
* @brief USB Clock source.
*/
#if !defined(STM32_USBSW) || defined(__DOXYGEN__)
@@ -769,28 +750,6 @@ #endif
/**
- * @brief ADC frequency.
- */
-#if (STM32_ADCSW == STM32_ADCSW_HSI14) || defined(__DOXYGEN__)
-#define STM32_ADCCLK STM32_HSI14CLK
-#elif STM32_ADCSW == STM32_ADCSW_PCLK
-#if (STM32_ADCPRE == STM32_ADCPRE_DIV2) || defined(__DOXYGEN__)
-#define STM32_ADCCLK (STM32_PCLK / 2)
-#elif STM32_ADCPRE == STM32_ADCPRE_DIV4
-#define STM32_ADCCLK (STM32_PCLK / 4)
-#else
-#error "invalid STM32_ADCPRE value specified"
-#endif
-#else
-#error "invalid source selected for ADC clock"
-#endif
-
-/* ADC frequency check.*/
-#if STM32_ADCCLK > STM32_ADCCLK_MAX
-#error "STM32_ADCCLK exceeding maximum frequency (STM32_ADCCLK_MAX)"
-#endif
-
-/**
* @brief USB frequency.
*/
#if (STM32_USBSW == STM32_USBSW_HSI48) || defined(__DOXYGEN__)
|