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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-07-29 08:59:55 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-07-29 08:59:55 +0000 |
| commit | bbacae2118c4c05a477d93ec0aa356e63442f6e2 (patch) | |
| tree | be5ee5fffaa63bf025c28bbd2f18781a10221616 /os/hal/ports/STM32/STM32F0xx/hal_lld.c | |
| parent | b0b485d70c2a0f38a785103ea1d1181e755e2dad (diff) | |
| download | ChibiOS-bbacae2118c4c05a477d93ec0aa356e63442f6e2.tar.gz ChibiOS-bbacae2118c4c05a477d93ec0aa356e63442f6e2.tar.bz2 ChibiOS-bbacae2118c4c05a477d93ec0aa356e63442f6e2.zip | |
Aligned mcuconf.h files for STM32F0xx devices. Removed obsolete settings, added DMA remapping settings.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8125 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F0xx/hal_lld.c')
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/hal_lld.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.c b/os/hal/ports/STM32/STM32F0xx/hal_lld.c index c472e11e9..bb230edcd 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.c @@ -189,9 +189,9 @@ void stm32_clock_init(void) { /* Clock settings.*/
RCC->CFGR = STM32_MCOSEL | STM32_PLLMUL | STM32_PLLSRC |
- STM32_ADCPRE | STM32_PPRE | STM32_HPRE;
+ STM32_PPRE | STM32_HPRE;
RCC->CFGR2 = STM32_PREDIV;
- RCC->CFGR3 = STM32_ADCSW | STM32_USBSW | STM32_CECSW |
+ RCC->CFGR3 = STM32_USBSW | STM32_CECSW |
STM32_I2C1SW | STM32_USART1SW;
#if STM32_ACTIVATE_PLL
|