diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-26 09:24:53 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-26 09:24:53 +0000 |
| commit | df18715f17db9273f45f880d7ba390b983eb8869 (patch) | |
| tree | 8d9bdd0d80f0c115256f9e7ac23fde39615bbf95 /os/hal/ports/STM32/LLD | |
| parent | 5159ce92aa4f9a991a1b4c305d4aef06cc586e87 (diff) | |
| download | ChibiOS-df18715f17db9273f45f880d7ba390b983eb8869.tar.gz ChibiOS-df18715f17db9273f45f880d7ba390b983eb8869.tar.bz2 ChibiOS-df18715f17db9273f45f880d7ba390b983eb8869.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7100 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD')
51 files changed, 807 insertions, 815 deletions
diff --git a/os/hal/ports/STM32/LLD/DACv1/dac_lld.c b/os/hal/ports/STM32/LLD/DACv1/dac_lld.c index 943f388fa..865fa32ae 100644 --- a/os/hal/ports/STM32/LLD/DACv1/dac_lld.c +++ b/os/hal/ports/STM32/LLD/DACv1/dac_lld.c @@ -1,351 +1,347 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see <http://www.gnu.org/licenses/>. -*/ - -/** - * @file STM32/DACv1/dac_lld.c - * @brief STM32 DAC subsystem low level driver source. - * - * @addtogroup DAC - * @{ - */ - -#include "hal.h" - -#if HAL_USE_DAC || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver local definitions. */ -/*===========================================================================*/ - -#if !defined(DAC1) -#define DAC1 DAC -#define rccEnableDAC1 rccEnableDAC -#define rccDisableDAC1 rccDisableDAC -#endif - -#define DAC_CHN1_DMA_CHANNEL \ - STM32_DMA_GETCHANNEL(STM32_DAC_CHN1_DMA_STREAM, \ - STM32_DAC_CHN1_DMA_CHN) - -#define DAC_CHN2_DMA_CHANNEL \ - STM32_DMA_GETCHANNEL(STM32_DAC_CHN2_DMA_STREAM, \ - STM32_DAC_CHN2_DMA_CHN) - -#define DAC_CHN3_DMA_CHANNEL \ - STM32_DMA_GETCHANNEL(STM32_DAC_CHN3_DMA_STREAM, \ - STM32_DAC_CHN3_DMA_CHN) - -/*===========================================================================*/ -/* Driver exported variables. */ -/*===========================================================================*/ - -/** @brief CHN1 driver identifier.*/ -#if STM32_DAC_USE_CHN1 || defined(__DOXYGEN__) -DACDriver DACD1; -#endif - -/** @brief CHN2 driver identifier.*/ -#if STM32_DAC_USE_CHN2 || defined(__DOXYGEN__) -DACDriver DACD2; -#endif - -/** @brief CHN3 driver identifier.*/ -#if STM32_DAC_USE_CHN3 || defined(__DOXYGEN__) -DACDriver DACD3; -#endif - -/*===========================================================================*/ -/* Driver local variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver local functions. */ -/*===========================================================================*/ - -/** - * @brief Shared end/half-of-tx service routine. - * - * @param[in] dacp pointer to the @p DACDriver object - * @param[in] flags pre-shifted content of the ISR register - */ -static void dac_lld_serve_tx_interrupt(DACDriver *dacp, uint32_t flags) { - -#if defined(STM32_DAC_DMA_ERROR_HOOK) - (void)dacp; - if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) { - /* DMA errors handling.*/ - //~ _dac_isr_error_code(dacp, flags); - } - else { - if ((flags & STM32_DMA_ISR_HTIF) != 0) { - /* Half transfer processing.*/ - //~ _dac_isr_half_code(dacp); - } - if ((flags & STM32_DMA_ISR_TCIF) != 0) { - /* Transfer complete processing.*/ - //~ _dac_isr_full_code(dacp); - } - } -#else - (void)dacp; - (void)flags; -#endif -} - -/*===========================================================================*/ -/* Driver interrupt handlers. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Low level DAC driver initialization. - * - * @notapi - */ -void dac_lld_init(void) { - -#if STM32_DAC_USE_CHN1 - dacObjectInit(&DACD1); - DACD1.dac = DAC1; - DACD1.tim = STM32_TIM6; - DACD1.irqprio = STM32_DAC_CHN1_IRQ_PRIORITY; - DACD1.dma = STM32_DMA_STREAM(STM32_DAC_CHN1_DMA_STREAM); - DACD1.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN1_DMA_CHANNEL) | \ - STM32_DMA_CR_PL(STM32_DAC_CHN1_DMA_PRIORITY) | \ - STM32_DMA_CR_DIR_M2P | \ - STM32_DMA_CR_DMEIE | \ - STM32_DMA_CR_TEIE | \ - STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE; -#endif - -#if STM32_DAC_USE_CHN2 - dacObjectInit(&DACD2); - DACD2.dac = DAC1; - DACD2.tim = STM32_TIM7; - DACD2.irqprio = STM32_DAC_CHN2_IRQ_PRIORITY; - DACD2.dma = STM32_DMA_STREAM(STM32_DAC_CHN2_DMA_STREAM); - DACD2.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN2_DMA_CHANNEL) | \ - STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \ - STM32_DMA_CR_DIR_M2P | \ - STM32_DMA_CR_DMEIE | \ - STM32_DMA_CR_TEIE | \ - STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE; -#endif - -#if STM32_DAC_USE_CHN3 - dacObjectInit(&DACD3); - DACD3.dac = DAC2; - DACD3.tim = STM32_TIM18; - DACD3.irqprio = STM32_DAC_CHN3_IRQ_PRIORITY; - DACD3.dma = STM32_DMA_STREAM(STM32_DAC_CHN3_DMA_STREAM); - DACD3.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN3_DMA_CHANNEL) | \ - STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \ - STM32_DMA_CR_DIR_M2P | \ - STM32_DMA_CR_DMEIE | \ - STM32_DMA_CR_TEIE | \ - STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE; -#endif -} - -/** - * @brief Configures and activates the DAC peripheral. - * - * @param[in] dacp pointer to the @p DACDriver object - * - * @notapi - */ -void dac_lld_start(DACDriver *dacp) { - uint32_t arr, regshift, trgo, dataoffset; - bool b; - /* If in stopped state then enables the DAC and DMA clocks.*/ - if (dacp->state == DAC_STOP) { -#if STM32_DAC_USE_CHN1 - if (&DACD1 == dacp) { - rccEnableDAC1(FALSE); - /* DAC1 CR data is at bits 0:15 */ - regshift = 0; - dataoffset = 0; - /* Timer setup */ - rccEnableTIM6(FALSE); - rccResetTIM6(); - trgo = STM32_DAC_CR_TSEL_TIM6; - } -#endif -#if STM32_DAC_USE_CHN2 - if (&DACD2 == dacp) { - rccEnableDAC1(FALSE); - /* DAC2 CR data is at bits 16:31 */ - regshift = 16; - dataoffset = &dacp->dac->DHR12R2 - &dacp->dac->DHR12R1; - /* Timer setup */ - rccEnableTIM7(FALSE); - rccResetTIM7(); - trgo = STM32_DAC_CR_TSEL_TIM7; - } -#endif -#if STM32_DAC_USE_CHN3 - if (&DACD3 == dacp) { - rccEnableDAC2(FALSE); - /* DAC3 CR data is at bits 0:15 */ - regshift = 0; - dataoffset = 0; - /* Timer setup */ - rccEnableTIM18(FALSE); - rccResetTIM18(); - trgo = STM32_DAC_CR_TSEL_TIM18; - } -#endif -#if STM32_DAC_USE_CHN1 || STM32_DAC_USE_CHN2 || STM32_DAC_USE_CHN3 - dacp->clock = STM32_TIMCLK1; - arr = (dacp->clock / dacp->config->frequency); - osalDbgAssert((arr <= 0xFFFF), - "invalid frequency"); - - /* Timer configuration.*/ - dacp->tim->CR1 = 0; /* Initially stopped. */ - dacp->tim->PSC = 0; /* Prescaler value. */ - dacp->tim->DIER = 0; - dacp->tim->ARR = arr; - dacp->tim->EGR = TIM_EGR_UG; /* Update event. */ - dacp->tim->CR2 &= (uint16_t)~TIM_CR2_MMS; - dacp->tim->CR2 |= (uint16_t)TIM_CR2_MMS_1; /* Enable TRGO updates. */ - dacp->tim->CNT = 0; /* Reset counter. */ - dacp->tim->SR = 0; /* Clear pending IRQs. */ - /* Update Event IRQ enabled. */ - /* Timer start.*/ - dacp->tim->CR1 = TIM_CR1_CEN; - - /* DAC configuration */ - dacp->dac->CR |= ( (dacp->dac->CR & ~STM32_DAC_CR_MASK) | \ - (STM32_DAC_CR_EN | STM32_DAC_CR_DMAEN | dacp->config->cr_flags) ) << regshift; - - /* DMA setup. */ - b = dmaStreamAllocate(dacp->dma, - dacp->irqprio, - (stm32_dmaisr_t)dac_lld_serve_tx_interrupt, - (void *)dacp); - osalDbgAssert(!b, "stream already allocated"); - switch (dacp->config->dhrm) { - /* Sets the DAC data register */ - case DAC_DHRM_12BIT_RIGHT: - dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12R1 + dataoffset); - dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) | - STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD; - break; - case DAC_DHRM_12BIT_LEFT: - dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12L1 + dataoffset); - dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) | - STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD; - break; - case DAC_DHRM_8BIT_RIGHT: - dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8R1 + dataoffset); - dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) | - STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE; - break; -#if defined(STM32_HAS_DAC_CHN2) && STM32_HAS_DAC_CHN2 - case DAC_DHRM_12BIT_RIGHT_DUAL: - dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12RD); - dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) | - STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD; - break; - case DAC_DHRM_12BIT_LEFT_DUAL: - dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12LD); - dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) | - STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD; - break; - case DAC_DHRM_8BIT_RIGHT_DUAL: - dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8RD); - dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) | - STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE; - break; -#endif - } - - dacp->dac->CR |= trgo << regshift; /* Enable timer trigger */ -#endif - } -} - -/** - * @brief Deactivates the DAC peripheral. - * - * @param[in] dacp pointer to the @p DACDriver object - * - * @notapi - */ -void dac_lld_stop(DACDriver *dacp) { - - /* If in ready state then disables the DAC clock.*/ - if (dacp->state == DAC_READY) { - - /* DMA disable.*/ - dmaStreamRelease(dacp->dma); - -#if STM32_DAC_USE_CHN1 - if (&DACD1 == dacp) { - dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC1 disable.*/ - } -#endif -#if STM32_DAC_USE_CHN2 - if (&DACD2 == dacp) { - dacp->dac->CR &= ~STM32_DAC_CR_EN << 16; /* DAC1 disable.*/ - } -#endif -#if STM32_DAC_USE_CHN3 - if (&DACD3 == dacp) { - dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC2 disable.*/ - rccDisableDAC2(FALSE); /* DAC Clock disable.*/ - } -#endif - dacp->tim->CR1 &= ~TIM_CR1_CEN; /* Disable associated timer */ - dacp->state = DAC_STOP; - - if (!(DAC1->CR & (STM32_DAC_CR_EN | STM32_DAC_CR_EN << 16))) { - /* DAC Clock disable only if all channels are off.*/ - rccDisableDAC1(FALSE); - } - } -} - -/** - * @brief Sends data over the DAC bus. - * @details This asynchronous function starts a transmit operation. - * @post At the end of the operation the configured callback is invoked. - * - * @param[in] dacp pointer to the @p DACDriver object - * @param[in] n number of words to send - * @param[in] txbuf the pointer to the transmit buffer - * - * @notapi - */ -void dac_lld_start_conversion(DACDriver *dacp) { - osalDbgAssert(dacp->samples, - "dacp->samples is NULL pointer"); - dmaStreamSetMemory0(dacp->dma, dacp->samples); - dmaStreamSetTransactionSize(dacp->dma, dacp->depth); - dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN | - STM32_DMA_CR_CIRC); -} -#endif /* HAL_USE_DAC */ - -/** @} */ +/*
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file STM32/DACv1/dac_lld.c
+ * @brief STM32 DAC subsystem low level driver source.
+ *
+ * @addtogroup DAC
+ * @{
+ */
+
+#include "hal.h"
+
+#if HAL_USE_DAC || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+#if !defined(DAC1)
+#define DAC1 DAC
+#define rccEnableDAC1 rccEnableDAC
+#define rccDisableDAC1 rccDisableDAC
+#endif
+
+#define DAC_CHN1_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_DAC_CHN1_DMA_STREAM, \
+ STM32_DAC_CHN1_DMA_CHN)
+
+#define DAC_CHN2_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_DAC_CHN2_DMA_STREAM, \
+ STM32_DAC_CHN2_DMA_CHN)
+
+#define DAC_CHN3_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_DAC_CHN3_DMA_STREAM, \
+ STM32_DAC_CHN3_DMA_CHN)
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/** @brief CHN1 driver identifier.*/
+#if STM32_DAC_USE_CHN1 || defined(__DOXYGEN__)
+DACDriver DACD1;
+#endif
+
+/** @brief CHN2 driver identifier.*/
+#if STM32_DAC_USE_CHN2 || defined(__DOXYGEN__)
+DACDriver DACD2;
+#endif
+
+/** @brief CHN3 driver identifier.*/
+#if STM32_DAC_USE_CHN3 || defined(__DOXYGEN__)
+DACDriver DACD3;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Shared end/half-of-tx service routine.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ * @param[in] flags pre-shifted content of the ISR register
+ */
+static void dac_lld_serve_tx_interrupt(DACDriver *dacp, uint32_t flags) {
+
+#if defined(STM32_DAC_DMA_ERROR_HOOK)
+ (void)dacp;
+ if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) {
+ /* DMA errors handling.*/
+ //~ _dac_isr_error_code(dacp, flags);
+ }
+ else {
+ if ((flags & STM32_DMA_ISR_HTIF) != 0) {
+ /* Half transfer processing.*/
+ //~ _dac_isr_half_code(dacp);
+ }
+ if ((flags & STM32_DMA_ISR_TCIF) != 0) {
+ /* Transfer complete processing.*/
+ //~ _dac_isr_full_code(dacp);
+ }
+ }
+#else
+ (void)dacp;
+ (void)flags;
+#endif
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level DAC driver initialization.
+ *
+ * @notapi
+ */
+void dac_lld_init(void) {
+
+#if STM32_DAC_USE_CHN1
+ dacObjectInit(&DACD1);
+ DACD1.dac = DAC1;
+ DACD1.tim = STM32_TIM6;
+ DACD1.irqprio = STM32_DAC_CHN1_IRQ_PRIORITY;
+ DACD1.dma = STM32_DMA_STREAM(STM32_DAC_CHN1_DMA_STREAM);
+ DACD1.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN1_DMA_CHANNEL) | \
+ STM32_DMA_CR_PL(STM32_DAC_CHN1_DMA_PRIORITY) | \
+ STM32_DMA_CR_DIR_M2P | \
+ STM32_DMA_CR_DMEIE | \
+ STM32_DMA_CR_TEIE | \
+ STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
+#endif
+
+#if STM32_DAC_USE_CHN2
+ dacObjectInit(&DACD2);
+ DACD2.dac = DAC1;
+ DACD2.tim = STM32_TIM7;
+ DACD2.irqprio = STM32_DAC_CHN2_IRQ_PRIORITY;
+ DACD2.dma = STM32_DMA_STREAM(STM32_DAC_CHN2_DMA_STREAM);
+ DACD2.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN2_DMA_CHANNEL) | \
+ STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \
+ STM32_DMA_CR_DIR_M2P | \
+ STM32_DMA_CR_DMEIE | \
+ STM32_DMA_CR_TEIE | \
+ STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
+#endif
+
+#if STM32_DAC_USE_CHN3
+ dacObjectInit(&DACD3);
+ DACD3.dac = DAC2;
+ DACD3.tim = STM32_TIM18;
+ DACD3.irqprio = STM32_DAC_CHN3_IRQ_PRIORITY;
+ DACD3.dma = STM32_DMA_STREAM(STM32_DAC_CHN3_DMA_STREAM);
+ DACD3.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN3_DMA_CHANNEL) | \
+ STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \
+ STM32_DMA_CR_DIR_M2P | \
+ STM32_DMA_CR_DMEIE | \
+ STM32_DMA_CR_TEIE | \
+ STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
+#endif
+}
+
+/**
+ * @brief Configures and activates the DAC peripheral.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ *
+ * @notapi
+ */
+void dac_lld_start(DACDriver *dacp) {
+ uint32_t arr, regshift, trgo, dataoffset;
+ bool b;
+ /* If in stopped state then enables the DAC and DMA clocks.*/
+ if (dacp->state == DAC_STOP) {
+#if STM32_DAC_USE_CHN1
+ if (&DACD1 == dacp) {
+ rccEnableDAC1(FALSE);
+ /* DAC1 CR data is at bits 0:15 */
+ regshift = 0;
+ dataoffset = 0;
+ /* Timer setup */
+ rccEnableTIM6(FALSE);
+ rccResetTIM6();
+ trgo = STM32_DAC_CR_TSEL_TIM6;
+ }
+#endif
+#if STM32_DAC_USE_CHN2
+ if (&DACD2 == dacp) {
+ rccEnableDAC1(FALSE);
+ /* DAC2 CR data is at bits 16:31 */
+ regshift = 16;
+ dataoffset = &dacp->dac->DHR12R2 - &dacp->dac->DHR12R1;
+ /* Timer setup */
+ rccEnableTIM7(FALSE);
+ rccResetTIM7();
+ trgo = STM32_DAC_CR_TSEL_TIM7;
+ }
+#endif
+#if STM32_DAC_USE_CHN3
+ if (&DACD3 == dacp) {
+ rccEnableDAC2(FALSE);
+ /* DAC3 CR data is at bits 0:15 */
+ regshift = 0;
+ dataoffset = 0;
+ /* Timer setup */
+ rccEnableTIM18(FALSE);
+ rccResetTIM18();
+ trgo = STM32_DAC_CR_TSEL_TIM18;
+ }
+#endif
+#if STM32_DAC_USE_CHN1 || STM32_DAC_USE_CHN2 || STM32_DAC_USE_CHN3
+ dacp->clock = STM32_TIMCLK1;
+ arr = (dacp->clock / dacp->config->frequency);
+ osalDbgAssert((arr <= 0xFFFF),
+ "invalid frequency");
+
+ /* Timer configuration.*/
+ dacp->tim->CR1 = 0; /* Initially stopped. */
+ dacp->tim->PSC = 0; /* Prescaler value. */
+ dacp->tim->DIER = 0;
+ dacp->tim->ARR = arr;
+ dacp->tim->EGR = TIM_EGR_UG; /* Update event. */
+ dacp->tim->CR2 &= (uint16_t)~TIM_CR2_MMS;
+ dacp->tim->CR2 |= (uint16_t)TIM_CR2_MMS_1; /* Enable TRGO updates. */
+ dacp->tim->CNT = 0; /* Reset counter. */
+ dacp->tim->SR = 0; /* Clear pending IRQs. */
+ /* Update Event IRQ enabled. */
+ /* Timer start.*/
+ dacp->tim->CR1 = TIM_CR1_CEN;
+
+ /* DAC configuration */
+ dacp->dac->CR |= ( (dacp->dac->CR & ~STM32_DAC_CR_MASK) | \
+ (STM32_DAC_CR_EN | STM32_DAC_CR_DMAEN | dacp->config->cr_flags) ) << regshift;
+
+ /* DMA setup. */
+ b = dmaStreamAllocate(dacp->dma,
+ dacp->irqprio,
+ (stm32_dmaisr_t)dac_lld_serve_tx_interrupt,
+ (void *)dacp);
+ osalDbgAssert(!b, "stream already allocated");
+ switch (dacp->config->dhrm) {
+ /* Sets the DAC data register */
+ case DAC_DHRM_12BIT_RIGHT:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12R1 + dataoffset);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_12BIT_LEFT:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12L1 + dataoffset);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_8BIT_RIGHT:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8R1 + dataoffset);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
+ break;
+#if defined(STM32_HAS_DAC_CHN2) && STM32_HAS_DAC_CHN2
+ case DAC_DHRM_12BIT_RIGHT_DUAL:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12RD);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_12BIT_LEFT_DUAL:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12LD);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
+ break;
+ case DAC_DHRM_8BIT_RIGHT_DUAL:
+ dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8RD);
+ dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
+ STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
+ break;
+#endif
+ }
+
+ dacp->dac->CR |= trgo << regshift; /* Enable timer trigger */
+#endif
+ }
+}
+
+/**
+ * @brief Deactivates the DAC peripheral.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ *
+ * @notapi
+ */
+void dac_lld_stop(DACDriver *dacp) {
+
+ /* If in ready state then disables the DAC clock.*/
+ if (dacp->state == DAC_READY) {
+
+ /* DMA disable.*/
+ dmaStreamRelease(dacp->dma);
+
+#if STM32_DAC_USE_CHN1
+ if (&DACD1 == dacp) {
+ dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC1 disable.*/
+ }
+#endif
+#if STM32_DAC_USE_CHN2
+ if (&DACD2 == dacp) {
+ dacp->dac->CR &= ~STM32_DAC_CR_EN << 16; /* DAC1 disable.*/
+ }
+#endif
+#if STM32_DAC_USE_CHN3
+ if (&DACD3 == dacp) {
+ dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC2 disable.*/
+ rccDisableDAC2(FALSE); /* DAC Clock disable.*/
+ }
+#endif
+ dacp->tim->CR1 &= ~TIM_CR1_CEN; /* Disable associated timer */
+ dacp->state = DAC_STOP;
+
+ if (!(DAC1->CR & (STM32_DAC_CR_EN | STM32_DAC_CR_EN << 16))) {
+ /* DAC Clock disable only if all channels are off.*/
+ rccDisableDAC1(FALSE);
+ }
+ }
+}
+
+/**
+ * @brief Sends data over the DAC bus.
+ * @details This asynchronous function starts a transmit operation.
+ * @post At the end of the operation the configured callback is invoked.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object
+ * @param[in] n number of words to send
+ * @param[in] txbuf the pointer to the transmit buffer
+ *
+ * @notapi
+ */
+void dac_lld_start_conversion(DACDriver *dacp) {
+ osalDbgAssert(dacp->samples,
+ "dacp->samples is NULL pointer");
+ dmaStreamSetMemory0(dacp->dma, dacp->samples);
+ dmaStreamSetTransactionSize(dacp->dma, dacp->depth);
+ dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN |
+ STM32_DMA_CR_CIRC);
+}
+#endif /* HAL_USE_DAC */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/DACv1/dac_lld.h b/os/hal/ports/STM32/LLD/DACv1/dac_lld.h index 8e219f0fa..dfef09d04 100644 --- a/os/hal/ports/STM32/LLD/DACv1/dac_lld.h +++ b/os/hal/ports/STM32/LLD/DACv1/dac_lld.h @@ -1,415 +1,411 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see <http://www.gnu.org/licenses/>. -*/ - -/** - * @file STM32/DACv1/dac_lld.h - * @brief STM32 DAC subsystem low level driver header. - * - * @addtogroup DAC - * @{ - */ - -#ifndef _DAC_LLD_H_ -#define _DAC_LLD_H_ - -#include "stm32_tim.h" - -#if HAL_USE_DAC || defined(__DOXYGEN__) - -/*===========================================================================*/ -/* Driver constants. */ -/*===========================================================================*/ - -#define STM32_DAC_CR_EN DAC_CR_EN1 -#define STM32_DAC_CR_DMAEN DAC_CR_DMAEN1 -#define STM32_DAC_CR_TEN DAC_CR_TEN1 - -#define STM32_DAC_CR_MASK (uint32_t)0x00000FFE - -#define STM32_DAC_CR_BOFF_ENABLE (uint32_t)0x00000000 -#define STM32_DAC_CR_BOFF_DISABLE DAC_CR_BOFF1 - -#define STM32_DAC_CR_TSEL_NONE (uint32_t)0x00000000 -#define STM32_DAC_CR_TSEL_TIM2 DAC_CR_TEN1 | DAC_CR_TSEL1_2 -#define STM32_DAC_CR_TSEL_TIM4 DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_2 -#define STM32_DAC_CR_TSEL_TIM5 DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_1 -#define STM32_DAC_CR_TSEL_TIM6 DAC_CR_TEN1 -#define STM32_DAC_CR_TSEL_TIM7 DAC_CR_TEN1 | DAC_CR_TSEL1_1 -#define STM32_DAC_CR_TSEL_TIM3 DAC_CR_TEN1 | DAC_CR_TSEL1_0 -#define STM32_DAC_CR_TSEL_TIM18 DAC_CR_TEN1 | DAC_CR_TSEL1_0 | DAC_CR_TSEL1_1 -#define STM32_DAC_CR_TSEL_EXT_IT9 DAC_CR_TEN1 | DAC_CR_TEN1 | DAC_CR_TSEL1_2 -#define STM32_DAC_CR_TSEL_SOFT DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_2 - -#define STM32_DAC_CR_WAVE_NONE (uint32_t)0x00000000 -#define STM32_DAC_CR_WAVE_NOISE DAC_CR_WAVE1_0 -#define STM32_DAC_CR_WAVE_TRIANGLE DAC_CR_WAVE1_1 - -#define STM32_DAC_MAMP_1 (uint32_t)0x00000000 -#define STM32_DAC_MAMP_3 DAC_CR_MAMP1_0 -#define STM32_DAC_MAMP_7 DAC_CR_MAMP1_1 -#define STM32_DAC_MAMP_15 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1 -#define STM32_DAC_MAMP_31 DAC_CR_MAMP1_2 -#define STM32_DAC_MAMP_63 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_2 -#define STM32_DAC_MAMP_127 DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2 -#define STM32_DAC_MAMP_255 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2 -#define STM32_DAC_MAMP_511 DAC_CR_MAMP1_3 -#define STM32_DAC_MAMP_1023 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_3 -#define STM32_DAC_MAMP_2047 DAC_CR_MAMP1_1 | DAC_CR_MAMP1_3 -#define STM32_DAC_MAMP_4095 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2 - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief DAC CHN1 driver enable switch. - * @details If set to @p TRUE the support for DAC CHN1 is included. - * @note The default is @p TRUE. - */ -#if !defined(STM32_DAC_USE_CHN1) || defined(__DOXYGEN__) -#define STM32_DAC_USE_CHN1 FALSE -#endif - -/** - * @brief DAC CHN2 driver enable switch. - * @details If set to @p TRUE the support for DAC CHN2 is included. - * @note The default is @p TRUE. - */ -#if !defined(STM32_DAC_USE_CHN2) || defined(__DOXYGEN__) -#define STM32_DAC_USE_CHN2 FALSE -#endif - -/** - * @brief DAC CHN3 driver enable switch. - * @details If set to @p TRUE the support for DAC CHN3 is included. - * @note The default is @p TRUE. - */ -#if !defined(STM32_DAC_USE_CHN3) || defined(__DOXYGEN__) -#define STM32_DAC_USE_CHN3 FALSE -#endif - -/** - * @brief DAC CHN1 interrupt priority level setting. - */ -#if !defined(STM32_DAC_CHN1_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_DAC_CHN1_IRQ_PRIORITY 10 -#endif - -/** - * @brief DAC CHN2 interrupt priority level setting. - */ -#if !defined(STM32_DAC_CHN2_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_DAC_CHN2_IRQ_PRIORITY 10 -#endif - -/** - * @brief DAC CHN3 interrupt priority level setting. - */ -#if !defined(STM32_DAC_CHN3_IRQ_PRIORITY) || defined(__DOXYGEN__) -#define STM32_DAC_CHN3_IRQ_PRIORITY 10 -#endif - -/** - * @brief DAC CHN1 DMA priority (0..3|lowest..highest). - */ -#if !defined(STM32_DAC_CHN1_DMA_PRIORITY) || defined(__DOXYGEN__) -#define STM32_DAC_CHN1_DMA_PRIORITY 2 -#endif - -/** - * @brief DAC CHN2 DMA priority (0..3|lowest..highest). - */ -#if !defined(STM32_DAC_CHN2_DMA_PRIORITY) || defined(__DOXYGEN__) -#define STM32_DAC_CHN2_DMA_PRIORITY 2 -#endif - -/** - * @brief DAC CHN3 DMA priority (0..3|lowest..highest). - */ -#if !defined(STM32_DAC_CHN3_DMA_PRIORITY) || defined(__DOXYGEN__) -#define STM32_DAC_CHN2_DMA_PRIORITY 2 -#endif - -/** - * @brief DAC DMA error hook. - */ -#if !defined(STM32_DAC_DMA_ERROR_HOOK) || defined(__DOXYGEN__) -#define STM32_DAC_DMA_ERROR_HOOK(dacp) osalSysHalt() -#endif - -/** - * @brief DMA stream used for DAC CHN1 TX operations. - * @note This option is only available on platforms with enhanced DMA. - */ -#if !defined(STM32_DAC_CHN1_DMA_STREAM) || defined(__DOXYGEN__) -#define STM32_DAC_CHN1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#endif - -/** - * @brief DMA stream used for DAC CHN2 TX operations. - * @note This option is only available on platforms with enhanced DMA. - */ -#if !defined(STM32_DAC_CHN2_DMA_STREAM) || defined(__DOXYGEN__) -#define STM32_DAC_CHN2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#endif - -/** - * @brief DMA stream used for DAC CHN3 TX operations. - * @note This option is only available on platforms with enhanced DMA. - */ -#if !defined(STM32_DAC_CHN3_DMA_STREAM) || defined(__DOXYGEN__) -#define STM32_DAC_CHN3_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if STM32_DAC_USE_CHN1 && !STM32_HAS_DAC_CHN1 -#error "DAC CHN1 not present in the selected device" -#endif - -#if STM32_DAC_USE_CHN2 && !STM32_HAS_DAC_CHN2 -#error "DAC CHN2 not present in the selected device" -#endif - -#if STM32_DAC_USE_CHN3 && !STM32_HAS_DAC_CHN3 -#error "DAC CHN3 not present in the selected device" -#endif - -#if !STM32_DAC_USE_CHN1 && !STM32_DAC_USE_CHN2 && !STM32_DAC_USE_CHN3 -#error "DAC driver activated but no DAC peripheral assigned" -#endif - -/* The following checks are only required when there is a DMA able to - reassign streams to different channels.*/ -#if STM32_ADVANCED_DMA -/* Check on the presence of the DMA streams settings in mcuconf.h.*/ -#if STM32_DAC_USE_CHN1 && !defined(STM32_DAC_CHN1_DMA_STREAM) -#error "DAC1 CHN1 DMA stream not defined" -#endif - -#if STM32_DAC_USE_CHN2 && !defined(STM32_DAC_CHN2_DMA_STREAM) -#error "DAC1 CHN2 DMA stream not defined" -#endif - -#if STM32_DAC_USE_CHN3 && !defined(STM32_DAC_CHN3_DMA_STREAM) -#error "DAC1 CHN3 DMA stream not defined" -#endif - -/* Check on the validity of the assigned DMA channels.*/ -#if STM32_DAC_USE_CHN1 && \ - !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN1_DMA_STREAM, STM32_DAC_CHN1_DMA_MSK) -#error "invalid DMA stream associated to DAC CHN1" -#endif - -#if STM32_DAC_USE_CHN2 && \ - !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN2_DMA_STREAM, STM32_DAC_CHN2_DMA_MSK) -#error "invalid DMA stream associated to DAC CHN2" -#endif - -#if STM32_DAC_USE_CHN3 && \ - !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN3_DMA_STREAM, STM32_DAC_CHN3_DMA_MSK) -#error "invalid DMA stream associated to DAC CHN3" -#endif -#endif /* STM32_ADVANCED_DMA */ - -#if !defined(STM32_DMA_REQUIRED) -#define STM32_DMA_REQUIRED -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @brief Type of a structure representing an DAC driver. - */ -typedef struct DACDriver DACDriver; - -/** - * @brief Type representing a DAC sample. - */ -typedef uint16_t dacsample_t; - -/** - * @brief DAC notification callback type. - * - * @param[in] dacp pointer to the @p DACDriver object triggering the - * callback - */ -typedef void (*daccallback_t)(DACDriver *dacp); - -typedef enum { - DAC_DHRM_12BIT_RIGHT = 0, - DAC_DHRM_12BIT_LEFT = 1, - DAC_DHRM_8BIT_RIGHT = 2, -#if STM32_HAS_DAC_CHN2 && !defined(__DOXYGEN__) - DAC_DHRM_12BIT_RIGHT_DUAL = 3, - DAC_DHRM_12BIT_LEFT_DUAL = 4, - DAC_DHRM_8BIT_RIGHT_DUAL = 5 -#endif -} dacdhrmode_t; - -/** - * @brief DAC Conversion group structure. - */ -typedef struct { - /** - * @brief Number of DAC channels. - */ - uint32_t num_channels; - /** - * @brief Operation complete callback or @p NULL. - */ - daccallback_t end_cb; - /** - * @brief Error handling callback or @p NULL. - */ - daccallback_t error_cb; - -} DACConversionGroup; - -/** - * @brief Driver configuration structure. - */ -typedef struct { - /** - * @brief Timer frequency in Hz. - */ - uint32_t frequency; - /* End of the mandatory fields.*/ - /** - * @brief DAC data holding register mode. - */ - dacdhrmode_t dhrm; - /** - * @brief DAC initialization data. - */ - uint32_t cr_flags; -} DACConfig; - -/** - * @brief Structure representing a DAC driver. - */ -struct DACDriver { - /** - * @brief Driver state. - */ - dacstate_t state; - /** - * @brief Conversion group. - */ - const DACConversionGroup *grpp; - /** - * @brief Samples buffer pointer. - */ - const dacsample_t *samples; - /** - * @brief Samples buffer size. - */ - uint16_t depth; - /** - * @brief Current configuration data. - */ - const DACConfig *config; -#if DAC_USE_WAIT || defined(__DOXYGEN__) - /** - * @brief Waiting thread. - */ - thread_reference_t thread; -#endif /* DAC_USE_WAIT */ -#if DAC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) - /** - * @brief Mutex protecting the bus. - */ - mutex_t mutex; -#endif /* DAC_USE_MUTUAL_EXCLUSION */ -#if defined(DAC_DRIVER_EXT_FIELDS) - DAC_DRIVER_EXT_FIELDS -#endif - /* End of the mandatory fields.*/ - /** - * @brief Pointer to the DAC registers block. - */ - DAC_TypeDef *dac; - /** - * @brief Pointer to the TIMx registers block. - */ - stm32_tim_t *tim; - /** - * @brief The Timer IRQ priority. - */ - uint32_t irqprio; - /** - * @brief Transmit DMA stream. - */ - const stm32_dma_stream_t *dma; - /** - * @brief TX DMA mode bit mask. - */ - uint32_t dmamode; - /** - * @brief Timer base clock. - */ - uint32_t clock; -}; - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#if STM32_DAC_USE_CHN1 && !defined(__DOXYGEN__) -extern DACDriver DACD1; -#endif - -#if STM32_DAC_USE_CHN2 && !defined(__DOXYGEN__) -extern DACDriver DACD2; -#endif - -#if STM32_DAC_USE_CHN3 && !defined(__DOXYGEN__) -extern DACDriver DACD3; -#endif - -#ifdef __cplusplus -extern "C" { -#endif - void dac_lld_init(void); - void dac_lld_start(DACDriver *dacp); - void dac_lld_stop(DACDriver *dacp); - void dac_lld_start_conversion(DACDriver *dacp); - void dac_lld_stop_conversion(DACDriver *dacp); -#ifdef __cplusplus -} -#endif - -#endif /* HAL_USE_DAC */ - -#endif /* _DAC_LLD_H_ */ - -/** @} */ +/*
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file STM32/DACv1/dac_lld.h
+ * @brief STM32 DAC subsystem low level driver header.
+ *
+ * @addtogroup DAC
+ * @{
+ */
+
+#ifndef _DAC_LLD_H_
+#define _DAC_LLD_H_
+
+#include "stm32_tim.h"
+
+#if HAL_USE_DAC || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+#define STM32_DAC_CR_EN DAC_CR_EN1
+#define STM32_DAC_CR_DMAEN DAC_CR_DMAEN1
+#define STM32_DAC_CR_TEN DAC_CR_TEN1
+
+#define STM32_DAC_CR_MASK (uint32_t)0x00000FFE
+
+#define STM32_DAC_CR_BOFF_ENABLE (uint32_t)0x00000000
+#define STM32_DAC_CR_BOFF_DISABLE DAC_CR_BOFF1
+
+#define STM32_DAC_CR_TSEL_NONE (uint32_t)0x00000000
+#define STM32_DAC_CR_TSEL_TIM2 DAC_CR_TEN1 | DAC_CR_TSEL1_2
+#define STM32_DAC_CR_TSEL_TIM4 DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_2
+#define STM32_DAC_CR_TSEL_TIM5 DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_1
+#define STM32_DAC_CR_TSEL_TIM6 DAC_CR_TEN1
+#define STM32_DAC_CR_TSEL_TIM7 DAC_CR_TEN1 | DAC_CR_TSEL1_1
+#define STM32_DAC_CR_TSEL_TIM3 DAC_CR_TEN1 | DAC_CR_TSEL1_0
+#define STM32_DAC_CR_TSEL_TIM18 DAC_CR_TEN1 | DAC_CR_TSEL1_0 | DAC_CR_TSEL1_1
+#define STM32_DAC_CR_TSEL_EXT_IT9 DAC_CR_TEN1 | DAC_CR_TEN1 | DAC_CR_TSEL1_2
+#define STM32_DAC_CR_TSEL_SOFT DAC_CR_TEN1 | DAC_CR_TEN0 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_2
+
+#define STM32_DAC_CR_WAVE_NONE (uint32_t)0x00000000
+#define STM32_DAC_CR_WAVE_NOISE DAC_CR_WAVE1_0
+#define STM32_DAC_CR_WAVE_TRIANGLE DAC_CR_WAVE1_1
+
+#define STM32_DAC_MAMP_1 (uint32_t)0x00000000
+#define STM32_DAC_MAMP_3 DAC_CR_MAMP1_0
+#define STM32_DAC_MAMP_7 DAC_CR_MAMP1_1
+#define STM32_DAC_MAMP_15 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1
+#define STM32_DAC_MAMP_31 DAC_CR_MAMP1_2
+#define STM32_DAC_MAMP_63 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_2
+#define STM32_DAC_MAMP_127 DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2
+#define STM32_DAC_MAMP_255 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2
+#define STM32_DAC_MAMP_511 DAC_CR_MAMP1_3
+#define STM32_DAC_MAMP_1023 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_3
+#define STM32_DAC_MAMP_2047 DAC_CR_MAMP1_1 | DAC_CR_MAMP1_3
+#define STM32_DAC_MAMP_4095 DAC_CR_MAMP1_0 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_2
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @name Configuration options
+ * @{
+ */
+/**
+ * @brief DAC CHN1 driver enable switch.
+ * @details If set to @p TRUE the support for DAC CHN1 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_DAC_USE_CHN1) || defined(__DOXYGEN__)
+#define STM32_DAC_USE_CHN1 FALSE
+#endif
+
+/**
+ * @brief DAC CHN2 driver enable switch.
+ * @details If set to @p TRUE the support for DAC CHN2 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_DAC_USE_CHN2) || defined(__DOXYGEN__)
+#define STM32_DAC_USE_CHN2 FALSE
+#endif
+
+/**
+ * @brief DAC CHN3 driver enable switch.
+ * @details If set to @p TRUE the support for DAC CHN3 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_DAC_USE_CHN3) || defined(__DOXYGEN__)
+#define STM32_DAC_USE_CHN3 FALSE
+#endif
+
+/**
+ * @brief DAC CHN1 interrupt priority level setting.
+ */
+#if !defined(STM32_DAC_CHN1_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN1_IRQ_PRIORITY 10
+#endif
+
+/**
+ * @brief DAC CHN2 interrupt priority level setting.
+ */
+#if !defined(STM32_DAC_CHN2_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN2_IRQ_PRIORITY 10
+#endif
+
+/**
+ * @brief DAC CHN3 interrupt priority level setting.
+ */
+#if !defined(STM32_DAC_CHN3_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN3_IRQ_PRIORITY 10
+#endif
+
+/**
+ * @brief DAC CHN1 DMA priority (0..3|lowest..highest).
+ */
+#if !defined(STM32_DAC_CHN1_DMA_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN1_DMA_PRIORITY 2
+#endif
+
+/**
+ * @brief DAC CHN2 DMA priority (0..3|lowest..highest).
+ */
+#if !defined(STM32_DAC_CHN2_DMA_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN2_DMA_PRIORITY 2
+#endif
+
+/**
+ * @brief DAC CHN3 DMA priority (0..3|lowest..highest).
+ */
+#if !defined(STM32_DAC_CHN3_DMA_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN2_DMA_PRIORITY 2
+#endif
+
+/**
+ * @brief DAC DMA error hook.
+ */
+#if !defined(STM32_DAC_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
+#define STM32_DAC_DMA_ERROR_HOOK(dacp) osalSysHalt()
+#endif
+
+/**
+ * @brief DMA stream used for DAC CHN1 TX operations.
+ * @note This option is only available on platforms with enhanced DMA.
+ */
+#if !defined(STM32_DAC_CHN1_DMA_STREAM) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#endif
+
+/**
+ * @brief DMA stream used for DAC CHN2 TX operations.
+ * @note This option is only available on platforms with enhanced DMA.
+ */
+#if !defined(STM32_DAC_CHN2_DMA_STREAM) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#endif
+
+/**
+ * @brief DMA stream used for DAC CHN3 TX operations.
+ * @note This option is only available on platforms with enhanced DMA.
+ */
+#if !defined(STM32_DAC_CHN3_DMA_STREAM) || defined(__DOXYGEN__)
+#define STM32_DAC_CHN3_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#endif
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+#if STM32_DAC_USE_CHN1 && !STM32_HAS_DAC_CHN1
+#error "DAC CHN1 not present in the selected device"
+#endif
+
+#if STM32_DAC_USE_CHN2 && !STM32_HAS_DAC_CHN2
+#error "DAC CHN2 not present in the selected device"
+#endif
+
+#if STM32_DAC_USE_CHN3 && !STM32_HAS_DAC_CHN3
+#error "DAC CHN3 not present in the selected device"
+#endif
+
+#if !STM32_DAC_USE_CHN1 && !STM32_DAC_USE_CHN2 && !STM32_DAC_USE_CHN3
+#error "DAC driver activated but no DAC peripheral assigned"
+#endif
+
+/* The following checks are only required when there is a DMA able to
+ reassign streams to different channels.*/
+#if STM32_ADVANCED_DMA
+/* Check on the presence of the DMA streams settings in mcuconf.h.*/
+#if STM32_DAC_USE_CHN1 && !defined(STM32_DAC_CHN1_DMA_STREAM)
+#error "DAC1 CHN1 DMA stream not defined"
+#endif
+
+#if STM32_DAC_USE_CHN2 && !defined(STM32_DAC_CHN2_DMA_STREAM)
+#error "DAC1 CHN2 DMA stream not defined"
+#endif
+
+#if STM32_DAC_USE_CHN3 && !defined(STM32_DAC_CHN3_DMA_STREAM)
+#error "DAC1 CHN3 DMA stream not defined"
+#endif
+
+/* Check on the validity of the assigned DMA channels.*/
+#if STM32_DAC_USE_CHN1 && \
+ !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN1_DMA_STREAM, STM32_DAC_CHN1_DMA_MSK)
+#error "invalid DMA stream associated to DAC CHN1"
+#endif
+
+#if STM32_DAC_USE_CHN2 && \
+ !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN2_DMA_STREAM, STM32_DAC_CHN2_DMA_MSK)
+#error "invalid DMA stream associated to DAC CHN2"
+#endif
+
+#if STM32_DAC_USE_CHN3 && \
+ !STM32_DMA_IS_VALID_ID(STM32_DAC_CHN3_DMA_STREAM, STM32_DAC_CHN3_DMA_MSK)
+#error "invalid DMA stream associated to DAC CHN3"
+#endif
+#endif /* STM32_ADVANCED_DMA */
+
+#if !defined(STM32_DMA_REQUIRED)
+#define STM32_DMA_REQUIRED
+#endif
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Type of a structure representing an DAC driver.
+ */
+typedef struct DACDriver DACDriver;
+
+/**
+ * @brief Type representing a DAC sample.
+ */
+typedef uint16_t dacsample_t;
+
+/**
+ * @brief DAC notification callback type.
+ *
+ * @param[in] dacp pointer to the @p DACDriver object triggering the
+ * callback
+ */
+typedef void (*daccallback_t)(DACDriver *dacp);
+
+typedef enum {
+ DAC_DHRM_12BIT_RIGHT = 0,
+ DAC_DHRM_12BIT_LEFT = 1,
+ DAC_DHRM_8BIT_RIGHT = 2,
+#if STM32_HAS_DAC_CHN2 && !defined(__DOXYGEN__)
+ DAC_DHRM_12BIT_RIGHT_DUAL = 3,
+ DAC_DHRM_12BIT_LEFT_DUAL = 4,
+ DAC_DHRM_8BIT_RIGHT_DUAL = 5
+#endif
+} dacdhrmode_t;
+
+/**
+ * @brief DAC Conversion group structure.
+ */
+typedef struct {
+ /**
+ * @brief Number of DAC channels.
+ */
+ uint32_t num_channels;
+ /**
+ * @brief Operation complete callback or @p NULL.
+ */
+ daccallback_t end_cb;
+ /**
+ * @brief Error handling callback or @p NULL.
+ */
+ daccallback_t error_cb;
+
+} DACConversionGroup;
+
+/**
+ * @brief Driver configuration structure.
+ */
+typedef struct {
+ /**
+ * @brief Timer frequency in Hz.
+ */
+ uint32_t frequency;
+ /* End of the mandatory fields.*/
+ /**
+ * @brief DAC data holding register mode.
+ */
+ dacdhrmode_t dhrm;
+ /**
+ * @brief DAC initialization data.
+ */
+ uint32_t cr_flags;
+} DACConfig;
+
+/**
+ * @brief Structure representing a DAC driver.
+ */
+struct DACDriver {
+ /**
+ * @brief Driver state.
+ */
+ dacstate_t state;
+ /**
+ * @brief Conversion group.
+ */
+ const DACConversionGroup *grpp;
+ /**
+ * @brief Samples buffer pointer.
+ */
+ const dacsample_t *samples;
+ /**
+ * @brief Samples buffer size.
+ */
+ uint16_t depth;
+ /**
+ * @brief Current configuration data.
+ */
+ const DACConfig *config;
+#if DAC_USE_WAIT || defined(__DOXYGEN__)
+ /**
+ * @brief Waiting thread.
+ */
+ thread_reference_t thread;
+#endif /* DAC_USE_WAIT */
+#if DAC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
+ /**
+ * @brief Mutex protecting the bus.
+ */
+ mutex_t mutex;
+#endif /* DAC_USE_MUTUAL_EXCLUSION */
+#if defined(DAC_DRIVER_EXT_FIELDS)
+ DAC_DRIVER_EXT_FIELDS
+#endif
+ /* End of the mandatory fields.*/
+ /**
+ * @brief Pointer to the DAC registers block.
+ */
+ DAC_TypeDef *dac;
+ /**
+ * @brief Pointer to the TIMx registers block.
+ */
+ stm32_tim_t *tim;
+ /**
+ * @brief The Timer IRQ priority.
+ */
+ uint32_t irqprio;
+ /**
+ * @brief Transmit DMA stream.
+ */
+ const stm32_dma_stream_t *dma;
+ /**
+ * @brief TX DMA mode bit mask.
+ */
+ uint32_t dmamode;
+ /**
+ * @brief Timer base clock.
+ */
+ uint32_t clock;
+};
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if STM32_DAC_USE_CHN1 && !defined(__DOXYGEN__)
+extern DACDriver DACD1;
+#endif
+
+#if STM32_DAC_USE_CHN2 && !defined(__DOXYGEN__)
+extern DACDriver DACD2;
+#endif
+
+#if STM32_DAC_USE_CHN3 && !defined(__DOXYGEN__)
+extern DACDriver DACD3;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void dac_lld_init(void);
+ void dac_lld_start(DACDriver *dacp);
+ void dac_lld_stop(DACDriver *dacp);
+ void dac_lld_start_conversion(DACDriver *dacp);
+ void dac_lld_stop_conversion(DACDriver *dacp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_DAC */
+
+#endif /* _DAC_LLD_H_ */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c index decfa9b28..3e54fb2fe 100644 --- a/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h index 56255ed1a..64efaf5d6 100644 --- a/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c index 2ded0a6ef..cd61ba19d 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h index 42b9ba02d..75c5cb9b0 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c b/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c index c63a295a2..8e3db9c65 100644 --- a/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c +++ b/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h b/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h index b3dffef7e..e2f41d41d 100644 --- a/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h +++ b/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c b/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c index a358ba0f3..18c5e9abd 100644 --- a/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c +++ b/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h b/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h index 070b2edad..0b9d0cfd3 100644 --- a/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h +++ b/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h b/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h index f81ce5412..e9ba8964e 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h +++ b/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c b/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c index e86268211..fad1932b1 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c +++ b/os/hal/ports/STM32/LLD/OTGv1/usb_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h b/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h index 689d607a5..334c1e1df 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h +++ b/os/hal/ports/STM32/LLD/OTGv1/usb_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c index 094b569d8..3e1cdde24 100644 --- a/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c +++ b/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.h b/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.h index 62b74cc46..16f0bb96e 100644 --- a/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.h +++ b/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c index 8a4429d6e..0e6e1ce82 100644 --- a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c +++ b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h index a226a12ff..d9c3958e4 100644 --- a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h +++ b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c index 162f138ed..e05b60cb7 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h b/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h index 595843d33..ec84f3bbf 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/i2s_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c index 048ad5743..8bb008ae4 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h index 011f83685..d4159a9a0 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/spi_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c index e21f80074..d18c5d7d3 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h index 271774bfc..d52acebae 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv2/spi_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c index 29173a8b5..414677d80 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h index 7146a9c3c..e772b5bab 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c index 5ad019052..1e935fd54 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h index f436096c3..87b5dfd4d 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c index 81caf52e0..07055fba4 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h index c77acf883..ca517651e 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/st_lld.c b/os/hal/ports/STM32/LLD/TIMv1/st_lld.c index 01aeabf1b..2de54c9ca 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/st_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/st_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/st_lld.h b/os/hal/ports/STM32/LLD/TIMv1/st_lld.h index 394e59e62..756d6a5c5 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/st_lld.h +++ b/os/hal/ports/STM32/LLD/TIMv1/st_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h b/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h index b5b7e7809..1e0c9ecbb 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h +++ b/os/hal/ports/STM32/LLD/TIMv1/stm32_tim.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.c b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.c index 1991c6ae0..d5ca6c373 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h index bdf8e9bdb..338624d16 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv1/serial_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c b/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c index b1856366c..6987d8b24 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h b/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h index b5992b340..4eb819b16 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c index 3ecf1fcbf..cdad06a10 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h index ac7415895..215aefc57 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv2/serial_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c index 54a187a39..3af72803e 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h b/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h index b9ee5aeb7..1c227987d 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h +++ b/os/hal/ports/STM32/LLD/USARTv2/uart_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h b/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h index 83f349e42..d16b6266c 100644 --- a/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h +++ b/os/hal/ports/STM32/LLD/USBv1/stm32_usb.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USBv1/usb_lld.c b/os/hal/ports/STM32/LLD/USBv1/usb_lld.c index a8159a898..3a7ff272d 100644 --- a/os/hal/ports/STM32/LLD/USBv1/usb_lld.c +++ b/os/hal/ports/STM32/LLD/USBv1/usb_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/USBv1/usb_lld.h b/os/hal/ports/STM32/LLD/USBv1/usb_lld.h index 828129032..1f0e5e45b 100644 --- a/os/hal/ports/STM32/LLD/USBv1/usb_lld.h +++ b/os/hal/ports/STM32/LLD/USBv1/usb_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/can_lld.c b/os/hal/ports/STM32/LLD/can_lld.c index 8070cefc8..ad9752d96 100644 --- a/os/hal/ports/STM32/LLD/can_lld.c +++ b/os/hal/ports/STM32/LLD/can_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/can_lld.h b/os/hal/ports/STM32/LLD/can_lld.h index d15119a40..09c9cb45c 100644 --- a/os/hal/ports/STM32/LLD/can_lld.h +++ b/os/hal/ports/STM32/LLD/can_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/ext_lld.c b/os/hal/ports/STM32/LLD/ext_lld.c index 8457db1cb..1c15cd8dd 100644 --- a/os/hal/ports/STM32/LLD/ext_lld.c +++ b/os/hal/ports/STM32/LLD/ext_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/ext_lld.h b/os/hal/ports/STM32/LLD/ext_lld.h index 7a59fa728..a2442cae0 100644 --- a/os/hal/ports/STM32/LLD/ext_lld.h +++ b/os/hal/ports/STM32/LLD/ext_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/mac_lld.c b/os/hal/ports/STM32/LLD/mac_lld.c index 92593426c..67b8a70cf 100644 --- a/os/hal/ports/STM32/LLD/mac_lld.c +++ b/os/hal/ports/STM32/LLD/mac_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/mac_lld.h b/os/hal/ports/STM32/LLD/mac_lld.h index 7c00d4927..0817ac9de 100644 --- a/os/hal/ports/STM32/LLD/mac_lld.h +++ b/os/hal/ports/STM32/LLD/mac_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/sdc_lld.c b/os/hal/ports/STM32/LLD/sdc_lld.c index 1aca84fb0..7b6310038 100644 --- a/os/hal/ports/STM32/LLD/sdc_lld.c +++ b/os/hal/ports/STM32/LLD/sdc_lld.c @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
diff --git a/os/hal/ports/STM32/LLD/sdc_lld.h b/os/hal/ports/STM32/LLD/sdc_lld.h index 6f0e389d6..035ddefdc 100644 --- a/os/hal/ports/STM32/LLD/sdc_lld.h +++ b/os/hal/ports/STM32/LLD/sdc_lld.h @@ -1,5 +1,5 @@ /*
- ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+ ChibiOS/HAL - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
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