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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-07-26 06:09:53 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-07-26 06:09:53 +0000 |
| commit | b05e7e8c4464bda8fecd21ff80086a34edf9292c (patch) | |
| tree | ab2423e62e64d8fcd8712e8b7c71f5e53d3a92f2 /os/hal/ports/STM32/LLD | |
| parent | 577f267dda280e46805275fca1722bf5dd112414 (diff) | |
| download | ChibiOS-b05e7e8c4464bda8fecd21ff80086a34edf9292c.tar.gz ChibiOS-b05e7e8c4464bda8fecd21ff80086a34edf9292c.tar.bz2 ChibiOS-b05e7e8c4464bda8fecd21ff80086a34edf9292c.zip | |
Re-added the lost revisions (8103 and 8104).
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8103 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD')
| -rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c index 09e1582bb..2ba0b3b68 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c @@ -30,17 +30,13 @@ /* Driver local definitions. */
/*===========================================================================*/
-#if defined(STM32L1XX)
-#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
- RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \
- RCC_AHBENR_GPIOEEN | RCC_AHBENR_GPIOHEN)
-#define AHB_LPEN_MASK AHB_EN_MASK
-
-#elif defined(STM32F0XX)
+#if defined(STM32L0XX) || defined(STM32L1XX)
#define AHB_EN_MASK STM32_GPIO_EN_MASK
+#define AHB_LPEN_MASK AHB_EN_MASK
-#elif defined(STM32F3XX) || defined(STM32F37X)
+#elif defined(STM32F0XX) || defined(STM32F3XX) || defined(STM32F37X)
#define AHB_EN_MASK STM32_GPIO_EN_MASK
+#define AHB_LPEN_MASK 0
#elif defined(STM32F2XX) || defined(STM32F4XX)
#define AHB1_EN_MASK STM32_GPIO_EN_MASK
@@ -94,7 +90,10 @@ void _pal_lld_init(const PALConfig *config) { /*
* Enables the GPIO related clocks.
*/
-#if defined(STM32L1XX)
+#if defined(STM32L0XX)
+ rccEnableAHB(AHB_EN_MASK, TRUE);
+ RCC->IOPSMENR |= AHB_LPEN_MASK;
+#elif defined(STM32L1XX)
rccEnableAHB(AHB_EN_MASK, TRUE);
RCC->AHBLPENR |= AHB_LPEN_MASK;
#elif defined(STM32F0XX)
|