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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-15 19:29:35 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-15 19:29:35 +0000 |
| commit | 46c3999c09d2018cfdd96d2de8a10a236016aef2 (patch) | |
| tree | 7d72a8b3eab6dea12e162c24f572d3acd305a585 /os/hal/ports/STM32/LLD | |
| parent | 18e6c991a78bb713b6780f07e35b344221ec837c (diff) | |
| download | ChibiOS-46c3999c09d2018cfdd96d2de8a10a236016aef2.tar.gz ChibiOS-46c3999c09d2018cfdd96d2de8a10a236016aef2.tar.bz2 ChibiOS-46c3999c09d2018cfdd96d2de8a10a236016aef2.zip | |
FSMC. Fixed bank base definitions.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7402 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD')
| -rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/fsmc.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h index 826715a35..2b579a229 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/fsmc.h @@ -36,6 +36,50 @@ /*===========================================================================*/ /* + * (Re)define if needed base address constants supplied in ST's CMSIS + */ +#if (defined(STM32F427xx) || defined(STM32F437xx) || \ + defined(STM32F429xx) || defined(STM32F439xx)) + #if !defined(FSMC_Bank1_R_BASE) + #define FSMC_Bank1_R_BASE (FMC_R_BASE + 0x0000) + #endif + #if !defined(FSMC_Bank1E_R_BASE) + #define FSMC_Bank1E_R_BASE (FMC_R_BASE + 0x0104) + #endif + #if !defined(FSMC_Bank2_R_BASE) + #define FSMC_Bank2_R_BASE (FMC_R_BASE + 0x0060) + #endif + #if !defined(FSMC_Bank3_R_BASE) + #define FSMC_Bank3_R_BASE (FMC_R_BASE + 0x0080) + #endif + #if !defined(FSMC_Bank4_R_BASE) + #define FSMC_Bank4_R_BASE (FMC_R_BASE + 0x00A0) + #endif + #if !defined(FSMC_Bank5_R_BASE) + #define FSMC_Bank5_R_BASE (FMC_R_BASE + 0x0140) + #endif + #if !defined(FSMC_Bank_R_BASE) + #define FSMC_Bank6_R_BASE (FMC_R_BASE + 0x0144) + #endif +#else + #if !defined(FSMC_Bank1_R_BASE) + #define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000) + #endif + #if !defined(FSMC_Bank1E_R_BASE) + #define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104) + #endif + #if !defined(FSMC_Bank2_R_BASE) + #define FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060) + #endif + #if !defined(FSMC_Bank3_R_BASE) + #define FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080) + #endif + #if !defined(FSMC_Bank4_R_BASE) + #define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0) + #endif +#endif + +/* * Base bank mappings */ #define FSMC_Bank1_MAP_BASE ((uint32_t) 0x60000000) |