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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-17 14:55:12 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-17 14:55:12 +0000
commitc953aa5ac86e4f913c41333a773a0903e0860d35 (patch)
treed2c00d4f0eaf25892e5d4f4ade85b2866e2c38de /os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
parentdf330879bb5c5630e847e2e9eec471080b0d18a4 (diff)
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Defaulted all STM32 drivers to enable peripheral clocks during stop/sleep modes. Now RCC macros are able to set or clear the LP bit of a peripheral.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11300 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c')
-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
index ede3fa8fb..f406d86a3 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
@@ -709,7 +709,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART1(false);
+ rccEnableUSART1(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);
}
@@ -728,7 +728,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART2(false);
+ rccEnableUSART2(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);
}
@@ -747,7 +747,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART3(false);
+ rccEnableUSART3(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);
}
@@ -766,7 +766,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART4(false);
+ rccEnableUART4(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART4_DMA_PRIORITY);
}
@@ -785,7 +785,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART5(false);
+ rccEnableUART5(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART5_DMA_PRIORITY);
}
@@ -804,7 +804,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUSART6(false);
+ rccEnableUSART6(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART6_DMA_PRIORITY);
}
@@ -823,7 +823,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART7(false);
+ rccEnableUART7(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART7_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART7_DMA_PRIORITY);
}
@@ -842,7 +842,7 @@ void uart_lld_start(UARTDriver *uartp) {
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
- rccEnableUART8(false);
+ rccEnableUART8(true);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART8_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART8_DMA_PRIORITY);
}