Mass update of all drivers to use the new DMA API. What could possibly go wrong?

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12521 110e8d01-0319-4d1e-a829-52ad28d1bb01

1 files changed, 108 insertions, 106 deletions

diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c
index 7d7fc8b2d..e821f7cd1 100644
--- a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c
@@ -521,63 +521,63 @@ void uart_lld_init(void) {
   uartObjectInit(&UARTD1);

   UARTD1.usart   = USART1;

   UARTD1.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;

-  UARTD1.dmarx   = STM32_DMA_STREAM(STM32_UART_USART1_RX_DMA_STREAM);

-  UARTD1.dmatx   = STM32_DMA_STREAM(STM32_UART_USART1_TX_DMA_STREAM);

+  UARTD1.dmarx   = NULL;

+  UARTD1.dmatx   = NULL;

 #endif

 

 #if STM32_UART_USE_USART2

   uartObjectInit(&UARTD2);

   UARTD2.usart   = USART2;

   UARTD2.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;

-  UARTD2.dmarx   = STM32_DMA_STREAM(STM32_UART_USART2_RX_DMA_STREAM);

-  UARTD2.dmatx   = STM32_DMA_STREAM(STM32_UART_USART2_TX_DMA_STREAM);

+  UARTD2.dmarx   = NULL;

+  UARTD2.dmatx   = NULL;

 #endif

 

 #if STM32_UART_USE_USART3

   uartObjectInit(&UARTD3);

   UARTD3.usart   = USART3;

   UARTD3.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;

-  UARTD3.dmarx   = STM32_DMA_STREAM(STM32_UART_USART3_RX_DMA_STREAM);

-  UARTD3.dmatx   = STM32_DMA_STREAM(STM32_UART_USART3_TX_DMA_STREAM);

+  UARTD3.dmarx   = NULL;

+  UARTD3.dmatx   = NULL;

 #endif

 

 #if STM32_UART_USE_UART4

   uartObjectInit(&UARTD4);

   UARTD4.usart   = UART4;

   UARTD4.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;

-  UARTD4.dmarx   = STM32_DMA_STREAM(STM32_UART_UART4_RX_DMA_STREAM);

-  UARTD4.dmatx   = STM32_DMA_STREAM(STM32_UART_UART4_TX_DMA_STREAM);

+  UARTD4.dmarx   = NULL;

+  UARTD4.dmatx   = NULL;

 #endif

 

 #if STM32_UART_USE_UART5

   uartObjectInit(&UARTD5);

   UARTD5.usart   = UART5;

   UARTD5.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;

-  UARTD5.dmarx   = STM32_DMA_STREAM(STM32_UART_UART5_RX_DMA_STREAM);

-  UARTD5.dmatx   = STM32_DMA_STREAM(STM32_UART_UART5_TX_DMA_STREAM);

+  UARTD5.dmarx   = NULL;

+  UARTD5.dmatx   = NULL;

 #endif

 

 #if STM32_UART_USE_USART6

   uartObjectInit(&UARTD6);

   UARTD6.usart   = USART6;

-  UARTD6.dmarx   = STM32_DMA_STREAM(STM32_UART_USART6_RX_DMA_STREAM);

-  UARTD6.dmatx   = STM32_DMA_STREAM(STM32_UART_USART6_TX_DMA_STREAM);

+  UARTD6.dmarx   = NULL;

+  UARTD6.dmatx   = NULL;

 #endif

 

 #if STM32_UART_USE_UART7

   uartObjectInit(&UARTD7);

   UARTD7.usart   = UART7;

   UARTD7.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;

-  UARTD7.dmarx   = STM32_DMA_STREAM(STM32_UART_UART7_RX_DMA_STREAM);

-  UARTD7.dmatx   = STM32_DMA_STREAM(STM32_UART_UART7_TX_DMA_STREAM);

+  UARTD7.dmarx   = NULL;

+  UARTD7.dmatx   = NULL;

 #endif

 

 #if STM32_UART_USE_UART8

   uartObjectInit(&UARTD8);

   UARTD8.usart   = UART8;

   UARTD8.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;

-  UARTD8.dmarx   = STM32_DMA_STREAM(STM32_UART_UART8_RX_DMA_STREAM);

-  UARTD8.dmatx   = STM32_DMA_STREAM(STM32_UART_UART8_TX_DMA_STREAM);

+  UARTD8.dmarx   = NULL;

+  UARTD8.dmatx   = NULL;

 #endif

 }

 

@@ -593,17 +593,17 @@ void uart_lld_start(UARTDriver *uartp) {
   if (uartp->state == UART_STOP) {

 #if STM32_UART_USE_USART1

     if (&UARTD1 == uartp) {

-      bool b;

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_USART1_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_USART1_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_USART1_RX_DMA_STREAM,

+                                     STM32_UART_USART1_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_USART1_TX_DMA_STREAM,

+                                     STM32_UART_USART1_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUSART1(true);

       nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |

@@ -613,17 +613,17 @@ void uart_lld_start(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART2

     if (&UARTD2 == uartp) {

-      bool b;

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_USART2_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_USART2_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_USART2_RX_DMA_STREAM,

+                                     STM32_UART_USART2_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_USART2_TX_DMA_STREAM,

+                                     STM32_UART_USART2_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUSART2(true);

       nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |

@@ -633,17 +633,17 @@ void uart_lld_start(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART3

     if (&UARTD3 == uartp) {

-      bool b;

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_USART3_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_USART3_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_USART3_RX_DMA_STREAM,

+                                     STM32_UART_USART3_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_USART3_TX_DMA_STREAM,

+                                     STM32_UART_USART3_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUSART3(true);

       nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |

@@ -653,23 +653,23 @@ void uart_lld_start(UARTDriver *uartp) {
 

 #if STM32_UART_USE_UART4

     if (&UARTD4 == uartp) {

-      bool b;

 

       osalDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,

                     "specified invalid bits in UART4 CR2 register settings");

       osalDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,

                     "specified invalid bits in UART4 CR3 register settings");

 

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_UART4_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_UART4_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_UART4_RX_DMA_STREAM,

+                                     STM32_UART_UART4_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_UART4_TX_DMA_STREAM,

+                                     STM32_UART_UART4_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUART4(true);

       nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) |

@@ -679,23 +679,23 @@ void uart_lld_start(UARTDriver *uartp) {
 

 #if STM32_UART_USE_UART5

     if (&UARTD5 == uartp) {

-      bool b;

 

       osalDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,

                     "specified invalid bits in UART5 CR2 register settings");

       osalDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,

                     "specified invalid bits in UART5 CR3 register settings");

 

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_UART5_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_UART5_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_UART5_RX_DMA_STREAM,

+                                     STM32_UART_UART5_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_UART5_TX_DMA_STREAM,

+                                     STM32_UART_UART5_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUART5(true);

       nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) |

@@ -705,17 +705,17 @@ void uart_lld_start(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART6

     if (&UARTD6 == uartp) {

-      bool b;

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_USART6_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_USART6_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_USART6_RX_DMA_STREAM,

+                                     STM32_UART_USART6_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_USART6_TX_DMA_STREAM,

+                                     STM32_UART_USART6_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUSART6(true);

       nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) |

@@ -725,23 +725,23 @@ void uart_lld_start(UARTDriver *uartp) {
 

 #if STM32_UART_USE_UART7

     if (&UARTD7 == uartp) {

-      bool b;

 

       osalDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,

                     "specified invalid bits in UART7 CR2 register settings");

       osalDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,

                     "specified invalid bits in UART7 CR3 register settings");

 

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_UART7_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_UART7_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_UART7_RX_DMA_STREAM,

+                                     STM32_UART_UART7_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_UART7_TX_DMA_STREAM,

+                                     STM32_UART_UART7_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUART7(true);

       nvicEnableVector(STM32_UART7_NUMBER, STM32_UART_UART7_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(UART7_RX_DMA_CHANNEL) |

@@ -751,23 +751,23 @@ void uart_lld_start(UARTDriver *uartp) {
 

 #if STM32_UART_USE_UART8

     if (&UARTD8 == uartp) {

-      bool b;

 

       osalDbgAssert((uartp->config->cr2 & STM32_UART45_CR2_CHECK_MASK) == 0,

                     "specified invalid bits in UART8 CR2 register settings");

       osalDbgAssert((uartp->config->cr3 & STM32_UART45_CR3_CHECK_MASK) == 0,

                     "specified invalid bits in UART8 CR3 register settings");

 

-      b = dmaStreamAllocate(uartp->dmarx,

-                            STM32_UART_UART8_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(uartp->dmatx,

-                            STM32_UART_UART8_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

-                            (void *)uartp);

-      osalDbgAssert(!b, "stream already allocated");

+      uartp->dmarx = dmaStreamAllocI(STM32_UART_UART8_RX_DMA_STREAM,

+                                     STM32_UART_UART8_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmarx != NULL, "unable to allocate stream");

+      uartp->dmatx = dmaStreamAllocI(STM32_UART_UART8_TX_DMA_STREAM,

+                                     STM32_UART_UART8_IRQ_PRIORITY,

+                                     (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,

+                                     (void *)uartp);

+      osalDbgAssert(uartp->dmatx != NULL, "unable to allocate stream");

+

       rccEnableUART8(true);

       nvicEnableVector(STM32_UART8_NUMBER, STM32_UART_UART8_IRQ_PRIORITY);

       uartp->dmamode |= STM32_DMA_CR_CHSEL(UART8_RX_DMA_CHANNEL) |

@@ -800,8 +800,10 @@ void uart_lld_stop(UARTDriver *uartp) {
 

   if (uartp->state == UART_READY) {

     usart_stop(uartp);

-    dmaStreamRelease(uartp->dmarx);

-    dmaStreamRelease(uartp->dmatx);

+    dmaStreamFreeI(uartp->dmarx);

+    dmaStreamFreeI(uartp->dmatx);

+    uartp->dmarx = NULL;

+    uartp->dmatx = NULL;

 

 #if STM32_UART_USE_USART1

     if (&UARTD1 == uartp) {