diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-04-04 11:41:54 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-04-04 11:41:54 +0000 |
| commit | 9a6be97248aa2a8c0de65cefa85051f3f810e833 (patch) | |
| tree | a6eb9cb484cfbec875f0bfe6c166aff5418dfd81 /os/hal/ports/STM32/LLD/TIMv1 | |
| parent | aca6f940196200789413a825e2157d4abf6d4676 (diff) | |
| download | ChibiOS-9a6be97248aa2a8c0de65cefa85051f3f810e833.tar.gz ChibiOS-9a6be97248aa2a8c0de65cefa85051f3f810e833.tar.bz2 ChibiOS-9a6be97248aa2a8c0de65cefa85051f3f810e833.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10139 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/TIMv1')
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c index a2846f4e2..0cc15f415 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c @@ -824,7 +824,7 @@ void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) { gptp->tim->CNT = 0; /* Reset counter. */
/* NOTE: After generating the UG event it takes several clock cycles before
- SR bit 0 goes to 1. This is because the clearing of CNT has been inserted
+ SR bit 0 goes to 1. This is why the clearing of CNT has been inserted
before the clearing of SR, to give it some time.*/
gptp->tim->SR = 0; /* Clear pending IRQs. */
if (NULL != gptp->config->callback)
|