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author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-12 16:01:42 +0000 |
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committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-12 16:01:42 +0000 |
commit | 8dcb0d3dc8be9329cabe275960157e21d32205fb (patch) | |
tree | 1ac9719e21eb00eb27dddbffadfaf3ca8d0200ab /os/hal/ports/STM32/LLD/TIMv1 | |
parent | a23a891953e5c2cd96f2ba067c5c1661fd0c76b8 (diff) | |
download | ChibiOS-8dcb0d3dc8be9329cabe275960157e21d32205fb.tar.gz ChibiOS-8dcb0d3dc8be9329cabe275960157e21d32205fb.tar.bz2 ChibiOS-8dcb0d3dc8be9329cabe275960157e21d32205fb.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8473 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/TIMv1')
-rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/st_lld.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/st_lld.c b/os/hal/ports/STM32/LLD/TIMv1/st_lld.c index aa44e041b..94a58a988 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/st_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/st_lld.c @@ -55,6 +55,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM2(FALSE)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM2_STOP
+#elif defined(STM32L4XX)
+#define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM2_STOP
#else
#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM2_STOP
#endif
@@ -76,6 +78,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM3(FALSE)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM3_STOP
+#elif defined(STM32L4XX)
+#define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM3_STOP
#else
#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM3_STOP
#endif
@@ -97,6 +101,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM4(FALSE)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM4_STOP
+#elif defined(STM32L4XX)
+#define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM4_STOP
#else
#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM4_STOP
#endif
@@ -118,6 +124,8 @@ #define ST_ENABLE_CLOCK() rccEnableTIM5(FALSE)
#if defined(STM32F1XX)
#define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM5_STOP
+#elif defined(STM32L4XX)
+#define ST_ENABLE_STOP() DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_TIM5_STOP
#else
#define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM5_STOP
#endif
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