aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c
diff options
context:
space:
mode:
authorGiovanni Di Sirio <gdisirio@gmail.com>2018-01-17 14:55:12 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-01-17 14:55:12 +0000
commitc953aa5ac86e4f913c41333a773a0903e0860d35 (patch)
treed2c00d4f0eaf25892e5d4f4ade85b2866e2c38de /os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c
parentdf330879bb5c5630e847e2e9eec471080b0d18a4 (diff)
downloadChibiOS-c953aa5ac86e4f913c41333a773a0903e0860d35.tar.gz
ChibiOS-c953aa5ac86e4f913c41333a773a0903e0860d35.tar.bz2
ChibiOS-c953aa5ac86e4f913c41333a773a0903e0860d35.zip
Defaulted all STM32 drivers to enable peripheral clocks during stop/sleep modes. Now RCC macros are able to set or clear the LP bit of a peripheral.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11300 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c')
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c
index 861c07247..98a02fabb 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c
@@ -395,7 +395,7 @@ void icu_lld_start(ICUDriver *icup) {
/* Clock activation and timer reset.*/
#if STM32_ICU_USE_TIM1
if (&ICUD1 == icup) {
- rccEnableTIM1(false);
+ rccEnableTIM1(true);
rccResetTIM1();
#if !defined(STM32_TIM1_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_ICU_TIM1_IRQ_PRIORITY);
@@ -411,7 +411,7 @@ void icu_lld_start(ICUDriver *icup) {
#if STM32_ICU_USE_TIM2
if (&ICUD2 == icup) {
- rccEnableTIM2(false);
+ rccEnableTIM2(true);
rccResetTIM2();
#if !defined(STM32_TIM2_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM2_NUMBER, STM32_ICU_TIM2_IRQ_PRIORITY);
@@ -426,7 +426,7 @@ void icu_lld_start(ICUDriver *icup) {
#if STM32_ICU_USE_TIM3
if (&ICUD3 == icup) {
- rccEnableTIM3(false);
+ rccEnableTIM3(true);
rccResetTIM3();
#if !defined(STM32_TIM3_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM3_NUMBER, STM32_ICU_TIM3_IRQ_PRIORITY);
@@ -441,7 +441,7 @@ void icu_lld_start(ICUDriver *icup) {
#if STM32_ICU_USE_TIM4
if (&ICUD4 == icup) {
- rccEnableTIM4(false);
+ rccEnableTIM4(true);
rccResetTIM4();
#if !defined(STM32_TIM4_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM4_NUMBER, STM32_ICU_TIM4_IRQ_PRIORITY);
@@ -456,7 +456,7 @@ void icu_lld_start(ICUDriver *icup) {
#if STM32_ICU_USE_TIM5
if (&ICUD5 == icup) {
- rccEnableTIM5(false);
+ rccEnableTIM5(true);
rccResetTIM5();
#if !defined(STM32_TIM5_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM5_NUMBER, STM32_ICU_TIM5_IRQ_PRIORITY);
@@ -471,7 +471,7 @@ void icu_lld_start(ICUDriver *icup) {
#if STM32_ICU_USE_TIM8
if (&ICUD8 == icup) {
- rccEnableTIM8(false);
+ rccEnableTIM8(true);
rccResetTIM8();
#if !defined(STM32_TIM8_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_ICU_TIM8_IRQ_PRIORITY);
@@ -487,7 +487,7 @@ void icu_lld_start(ICUDriver *icup) {
#if STM32_ICU_USE_TIM9
if (&ICUD9 == icup) {
- rccEnableTIM9(false);
+ rccEnableTIM9(true);
rccResetTIM9();
#if !defined(STM32_TIM9_SUPPRESS_ISR)
nvicEnableVector(STM32_TIM9_NUMBER, STM32_ICU_TIM9_IRQ_PRIORITY);