Defaulted all STM32 drivers to enable peripheral clocks during stop/sleep modes. Now RCC macros are able to set or clear the LP bit of a peripheral.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11300 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 12 insertions, 12 deletions

diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
index ce36ce224..79b126ec0 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
@@ -492,7 +492,7 @@ void gpt_lld_start(GPTDriver *gptp) {
     /* Clock activation.*/

 #if STM32_GPT_USE_TIM1

     if (&GPTD1 == gptp) {

-      rccEnableTIM1(false);

+      rccEnableTIM1(true);

       rccResetTIM1();

 #if !defined(STM32_TIM1_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_GPT_TIM1_IRQ_PRIORITY);

@@ -507,7 +507,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM2

     if (&GPTD2 == gptp) {

-      rccEnableTIM2(false);

+      rccEnableTIM2(true);

       rccResetTIM2();

 #if !defined(STM32_TIM2_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM2_NUMBER, STM32_GPT_TIM2_IRQ_PRIORITY);

@@ -522,7 +522,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM3

     if (&GPTD3 == gptp) {

-      rccEnableTIM3(false);

+      rccEnableTIM3(true);

       rccResetTIM3();

 #if !defined(STM32_TIM3_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM3_NUMBER, STM32_GPT_TIM3_IRQ_PRIORITY);

@@ -537,7 +537,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM4

     if (&GPTD4 == gptp) {

-      rccEnableTIM4(false);

+      rccEnableTIM4(true);

       rccResetTIM4();

 #if !defined(STM32_TIM4_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM4_NUMBER, STM32_GPT_TIM4_IRQ_PRIORITY);

@@ -552,7 +552,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM5

     if (&GPTD5 == gptp) {

-      rccEnableTIM5(false);

+      rccEnableTIM5(true);

       rccResetTIM5();

 #if !defined(STM32_TIM5_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM5_NUMBER, STM32_GPT_TIM5_IRQ_PRIORITY);

@@ -567,7 +567,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM6

     if (&GPTD6 == gptp) {

-      rccEnableTIM6(false);

+      rccEnableTIM6(true);

       rccResetTIM6();

 #if !defined(STM32_TIM6_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM6_NUMBER, STM32_GPT_TIM6_IRQ_PRIORITY);

@@ -582,7 +582,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM7

     if (&GPTD7 == gptp) {

-      rccEnableTIM7(false);

+      rccEnableTIM7(true);

       rccResetTIM7();

 #if !defined(STM32_TIM7_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM7_NUMBER, STM32_GPT_TIM7_IRQ_PRIORITY);

@@ -597,7 +597,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM8

     if (&GPTD8 == gptp) {

-      rccEnableTIM8(false);

+      rccEnableTIM8(true);

       rccResetTIM8();

 #if !defined(STM32_TIM8_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_GPT_TIM8_IRQ_PRIORITY);

@@ -612,7 +612,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM9

     if (&GPTD9 == gptp) {

-      rccEnableTIM9(false);

+      rccEnableTIM9(true);

       rccResetTIM9();

 #if !defined(STM32_TIM9_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM9_NUMBER, STM32_GPT_TIM9_IRQ_PRIORITY);

@@ -627,7 +627,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM11

     if (&GPTD11 == gptp) {

-      rccEnableTIM11(false);

+      rccEnableTIM11(true);

       rccResetTIM11();

 #if !defined(STM32_TIM11_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM11_NUMBER, STM32_GPT_TIM11_IRQ_PRIORITY);

@@ -642,7 +642,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM12

     if (&GPTD12 == gptp) {

-      rccEnableTIM12(false);

+      rccEnableTIM12(true);

       rccResetTIM12();

 #if !defined(STM32_TIM12_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM12_NUMBER, STM32_GPT_TIM12_IRQ_PRIORITY);

@@ -657,7 +657,7 @@ void gpt_lld_start(GPTDriver *gptp) {
 

 #if STM32_GPT_USE_TIM14

     if (&GPTD14 == gptp) {

-      rccEnableTIM14(false);

+      rccEnableTIM14(true);

       rccResetTIM14();

 #if !defined(STM32_TIM14_SUPPRESS_ISR)

       nvicEnableVector(STM32_TIM14_NUMBER, STM32_GPT_TIM14_IRQ_PRIORITY);