Mass update of all drivers to use the new DMA API. What could possibly go wrong?

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12521 110e8d01-0319-4d1e-a829-52ad28d1bb01

3 files changed, 174 insertions, 252 deletions

diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c
index 83258538e..aa437dafb 100644
--- a/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c
+++ b/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c
@@ -198,11 +198,11 @@ static void i2s_lld_serve_tx_interrupt(I2SDriver *i2sp, uint32_t flags) {
      level driver.*/

   if ((flags & STM32_DMA_ISR_TCIF) != 0) {

     /* Transfer complete processing.*/

-    _i2s_isr_code_half2(i2sp);

+    _i2s_isr_full_code(i2sp);

   }

   else if ((flags & STM32_DMA_ISR_HTIF) != 0) {

     /* Half transfer processing.*/

-    _i2s_isr_code_half1(i2sp);

+    _i2s_isr_half_code(i2sp);

   }

 }

 #endif

@@ -226,8 +226,9 @@ void i2s_lld_init(void) {
   i2sObjectInit(&I2SD1);

   I2SD1.spi       = SPI1;

   I2SD1.cfg       = STM32_I2S1_CFGR_CFG;

+  I2SD1.dmarx     = NULL;

+  I2SD1.dmatx     = NULL;

 #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE)

-  I2SD1.dmarx     = STM32_DMA_STREAM(STM32_I2S_SPI1_RX_DMA_STREAM);

   I2SD1.rxdmamode = STM32_DMA_CR_CHSEL(I2S1_RX_DMA_CHANNEL) |

                     STM32_DMA_CR_PL(STM32_I2S_SPI1_DMA_PRIORITY) |

                     STM32_DMA_CR_PSIZE_HWORD |

@@ -240,11 +241,9 @@ void i2s_lld_init(void) {
                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

 #else

-  I2SD1.dmarx     = NULL;

   I2SD1.rxdmamode = 0;

 #endif

 #if STM32_I2S_TX_ENABLED(STM32_I2S_SPI1_MODE)

-  I2SD1.dmatx     = STM32_DMA_STREAM(STM32_I2S_SPI1_TX_DMA_STREAM);

   I2SD1.txdmamode = STM32_DMA_CR_CHSEL(I2S1_TX_DMA_CHANNEL) |

                     STM32_DMA_CR_PL(STM32_I2S_SPI1_DMA_PRIORITY) |

                     STM32_DMA_CR_PSIZE_HWORD |

@@ -257,7 +256,6 @@ void i2s_lld_init(void) {
                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

 #else

-  I2SD1.dmatx     = NULL;

   I2SD1.txdmamode = 0;

 #endif

 #endif

@@ -266,8 +264,9 @@ void i2s_lld_init(void) {
   i2sObjectInit(&I2SD2);

   I2SD2.spi       = SPI2;

   I2SD2.cfg       = STM32_I2S2_CFGR_CFG;

+  I2SD2.dmarx     = NULL;

+  I2SD2.dmatx     = NULL;

 #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE)

-  I2SD2.dmarx     = STM32_DMA_STREAM(STM32_I2S_SPI2_RX_DMA_STREAM);

   I2SD2.rxdmamode = STM32_DMA_CR_CHSEL(I2S2_RX_DMA_CHANNEL) |

                     STM32_DMA_CR_PL(STM32_I2S_SPI2_DMA_PRIORITY) |

                     STM32_DMA_CR_PSIZE_HWORD |

@@ -280,11 +279,9 @@ void i2s_lld_init(void) {
                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

 #else

-  I2SD2.dmarx     = NULL;

   I2SD2.rxdmamode = 0;

 #endif

 #if STM32_I2S_TX_ENABLED(STM32_I2S_SPI2_MODE)

-  I2SD2.dmatx     = STM32_DMA_STREAM(STM32_I2S_SPI2_TX_DMA_STREAM);

   I2SD2.txdmamode = STM32_DMA_CR_CHSEL(I2S2_TX_DMA_CHANNEL) |

                     STM32_DMA_CR_PL(STM32_I2S_SPI2_DMA_PRIORITY) |

                     STM32_DMA_CR_PSIZE_HWORD |

@@ -297,7 +294,6 @@ void i2s_lld_init(void) {
                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

 #else

-  I2SD2.dmatx     = NULL;

   I2SD2.txdmamode = 0;

 #endif

 #endif

@@ -306,8 +302,9 @@ void i2s_lld_init(void) {
   i2sObjectInit(&I2SD3);

   I2SD3.spi       = SPI3;

   I2SD3.cfg       = STM32_I2S3_CFGR_CFG;

+  I2SD3.dmarx     = NULL;

+  I2SD3.dmatx     = NULL;

 #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE)

-  I2SD3.dmarx     = STM32_DMA_STREAM(STM32_I2S_SPI3_RX_DMA_STREAM);

   I2SD3.rxdmamode = STM32_DMA_CR_CHSEL(I2S3_RX_DMA_CHANNEL) |

                     STM32_DMA_CR_PL(STM32_I2S_SPI3_DMA_PRIORITY) |

                     STM32_DMA_CR_PSIZE_HWORD |

@@ -320,11 +317,9 @@ void i2s_lld_init(void) {
                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

 #else

-  I2SD3.dmarx     = NULL;

   I2SD3.rxdmamode = 0;

 #endif

 #if STM32_I2S_TX_ENABLED(STM32_I2S_SPI3_MODE)

-  I2SD3.dmatx     = STM32_DMA_STREAM(STM32_I2S_SPI3_TX_DMA_STREAM);

   I2SD3.txdmamode = STM32_DMA_CR_CHSEL(I2S3_TX_DMA_CHANNEL) |

                     STM32_DMA_CR_PL(STM32_I2S_SPI3_DMA_PRIORITY) |

                     STM32_DMA_CR_PSIZE_HWORD |

@@ -337,7 +332,6 @@ void i2s_lld_init(void) {
                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

 #else

-  I2SD3.dmatx     = NULL;

   I2SD3.txdmamode = 0;

 #endif

 #endif

@@ -357,17 +351,16 @@ void i2s_lld_start(I2SDriver *i2sp) {
 

 #if STM32_I2S_USE_SPI1

     if (&I2SD1 == i2sp) {

-      bool b;

 

       /* Enabling I2S unit clock.*/

       rccEnableSPI1(true);

 

 #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE)

-      b = dmaStreamAllocate(i2sp->dmarx,

-                            STM32_I2S_SPI1_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,

-                            (void *)i2sp);

-      osalDbgAssert(!b, "stream already allocated");

+      i2sp->dmarx = dmaStreamAllocI(STM32_I2S_SPI1_RX_DMA_STREAM,

+                                    STM32_I2S_SPI1_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,

+                                    (void *)i2sp);

+      osalDbgAssert(i2sp->dmarx != NULL, "unable to allocate stream");

 

       /* CRs settings are done here because those never changes until

          the driver is stopped.*/

@@ -375,11 +368,11 @@ void i2s_lld_start(I2SDriver *i2sp) {
       i2sp->spi->CR2 = SPI_CR2_RXDMAEN;

 #endif

 #if STM32_I2S_TX_ENABLED(STM32_I2S_SPI1_MODE)

-      b = dmaStreamAllocate(i2sp->dmatx,

-                            STM32_I2S_SPI1_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,

-                            (void *)i2sp);

-      osalDbgAssert(!b, "stream already allocated");

+      i2sp->dmatx = dmaStreamAllocI(STM32_I2S_SPI1_TX_DMA_STREAM,

+                                    STM32_I2S_SPI1_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,

+                                    (void *)i2sp);

+      osalDbgAssert(i2sp->dmatx != NULL, "unable to allocate stream");

 

       /* CRs settings are done here because those never changes until

          the driver is stopped.*/

@@ -391,17 +384,16 @@ void i2s_lld_start(I2SDriver *i2sp) {
 

 #if STM32_I2S_USE_SPI2

     if (&I2SD2 == i2sp) {

-      bool b;

 

       /* Enabling I2S unit clock.*/

       rccEnableSPI2(true);

 

 #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE)

-      b = dmaStreamAllocate(i2sp->dmarx,

-                            STM32_I2S_SPI2_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,

-                            (void *)i2sp);

-      osalDbgAssert(!b, "stream already allocated");

+      i2sp->dmarx = dmaStreamAllocI(STM32_I2S_SPI2_RX_DMA_STREAM,

+                                    STM32_I2S_SPI2_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,

+                                    (void *)i2sp);

+      osalDbgAssert(i2sp->dmarx != NULL, "unable to allocate stream");

 

       /* CRs settings are done here because those never changes until

          the driver is stopped.*/

@@ -409,11 +401,11 @@ void i2s_lld_start(I2SDriver *i2sp) {
       i2sp->spi->CR2 = SPI_CR2_RXDMAEN;

 #endif

 #if STM32_I2S_TX_ENABLED(STM32_I2S_SPI2_MODE)

-      b = dmaStreamAllocate(i2sp->dmatx,

-                            STM32_I2S_SPI2_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,

-                            (void *)i2sp);

-      osalDbgAssert(!b, "stream already allocated");

+      i2sp->dmatx = dmaStreamAllocI(STM32_I2S_SPI2_TX_DMA_STREAM,

+                                    STM32_I2S_SPI2_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,

+                                    (void *)i2sp);

+      osalDbgAssert(i2sp->dmatx != NULL, "unable to allocate stream");

 

       /* CRs settings are done here because those never changes until

          the driver is stopped.*/

@@ -425,17 +417,16 @@ void i2s_lld_start(I2SDriver *i2sp) {
 

 #if STM32_I2S_USE_SPI3

     if (&I2SD3 == i2sp) {

-      bool b;

 

       /* Enabling I2S unit clock.*/

       rccEnableSPI3(true);

 

 #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE)

-      b = dmaStreamAllocate(i2sp->dmarx,

-                            STM32_I2S_SPI3_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,

-                            (void *)i2sp);

-      osalDbgAssert(!b, "stream already allocated");

+      i2sp->dmarx = dmaStreamAllocI(STM32_I2S_SPI3_RX_DMA_STREAM,

+                                    STM32_I2S_SPI3_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)i2s_lld_serve_rx_interrupt,

+                                    (void *)i2sp);

+      osalDbgAssert(i2sp->dmarx != NULL, "unable to allocate stream");

 

       /* CRs settings are done here because those never changes until

          the driver is stopped.*/

@@ -443,11 +434,11 @@ void i2s_lld_start(I2SDriver *i2sp) {
       i2sp->spi->CR2 = SPI_CR2_RXDMAEN;

 #endif

 #if STM32_I2S_TX_ENABLED(STM32_I2S_SPI3_MODE)

-      b = dmaStreamAllocate(i2sp->dmatx,

-                            STM32_I2S_SPI3_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,

-                            (void *)i2sp);

-      osalDbgAssert(!b, "stream already allocated");

+      i2sp->dmatx = dmaStreamAllocI(STM32_I2S_SPI3_TX_DMA_STREAM,

+                                    STM32_I2S_SPI3_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)i2s_lld_serve_tx_interrupt,

+                                    (void *)i2sp);

+      osalDbgAssert(i2sp->dmatx != NULL, "unable to allocate stream");

 

       /* CRs settings are done here because those never changes until

          the driver is stopped.*/

@@ -477,10 +468,14 @@ void i2s_lld_stop(I2SDriver *i2sp) {
 

     /* SPI disable.*/

     i2sp->spi->CR2 = 0;

-    if (NULL != i2sp->dmarx)

-      dmaStreamRelease(i2sp->dmarx);

-    if (NULL != i2sp->dmatx)

-      dmaStreamRelease(i2sp->dmatx);

+    if (NULL != i2sp->dmarx) {

+      dmaStreamFreeI(i2sp->dmarx);

+      i2sp->dmarx = NULL;

+    }

+    if (NULL != i2sp->dmatx) {

+      dmaStreamFreeI(i2sp->dmatx);

+      i2sp->dmatx = NULL;

+    }

 

 #if STM32_I2S_USE_SPI1

     if (&I2SD1 == i2sp)

diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c
index 26e381c77..8639bbcbf 100644
--- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c
+++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c
@@ -30,51 +30,51 @@
 /* Driver local definitions.                                                 */

 /*===========================================================================*/

 

-#define SPI1_RX_DMA_CHANNEL                                                 \

+#define SPI1_RX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI1_RX_DMA_STREAM,                        \

                        STM32_SPI1_RX_DMA_CHN)

 

-#define SPI1_TX_DMA_CHANNEL                                                 \

+#define SPI1_TX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI1_TX_DMA_STREAM,                        \

                        STM32_SPI1_TX_DMA_CHN)

 

-#define SPI2_RX_DMA_CHANNEL                                                 \

+#define SPI2_RX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI2_RX_DMA_STREAM,                        \

                        STM32_SPI2_RX_DMA_CHN)

 

-#define SPI2_TX_DMA_CHANNEL                                                 \

+#define SPI2_TX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI2_TX_DMA_STREAM,                        \

                        STM32_SPI2_TX_DMA_CHN)

 

-#define SPI3_RX_DMA_CHANNEL                                                 \

+#define SPI3_RX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI3_RX_DMA_STREAM,                        \

                        STM32_SPI3_RX_DMA_CHN)

 

-#define SPI3_TX_DMA_CHANNEL                                                 \

+#define SPI3_TX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI3_TX_DMA_STREAM,                        \

                        STM32_SPI3_TX_DMA_CHN)

 

-#define SPI4_RX_DMA_CHANNEL                                                 \

+#define SPI4_RX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI4_RX_DMA_STREAM,                        \

                        STM32_SPI4_RX_DMA_CHN)

 

-#define SPI4_TX_DMA_CHANNEL                                                 \

+#define SPI4_TX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI4_TX_DMA_STREAM,                        \

                        STM32_SPI4_TX_DMA_CHN)

 

-#define SPI5_RX_DMA_CHANNEL                                                 \

+#define SPI5_RX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI5_RX_DMA_STREAM,                        \

                        STM32_SPI5_RX_DMA_CHN)

 

-#define SPI5_TX_DMA_CHANNEL                                                 \

+#define SPI5_TX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI5_TX_DMA_STREAM,                        \

                        STM32_SPI5_TX_DMA_CHN)

 

-#define SPI6_RX_DMA_CHANNEL                                                 \

+#define SPI6_RX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI6_RX_DMA_STREAM,                        \

                        STM32_SPI6_RX_DMA_CHN)

 

-#define SPI6_TX_DMA_CHANNEL                                                 \

+#define SPI6_TX_DMA_STREAM                                                 \

   STM32_DMA_GETCHANNEL(STM32_SPI_SPI6_TX_DMA_STREAM,                        \

                        STM32_SPI6_TX_DMA_CHN)

 

@@ -199,20 +199,15 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI1

   spiObjectInit(&SPID1);

   SPID1.spi       = SPI1;

-#if STM32_DMA_SUPPORTS_DMAMUX

-  SPID1.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI1_RX_DMA_CHANNEL);

-  SPID1.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI1_TX_DMA_CHANNEL);

-#else

-  SPID1.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI1_RX_DMA_STREAM);

-  SPID1.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI1_TX_DMA_STREAM);

-#endif

-  SPID1.rxdmamode = STM32_DMA_CR_CHSEL(SPI1_RX_DMA_CHANNEL) |

+  SPID1.dmarx     = NULL;

+  SPID1.dmatx     = NULL;

+  SPID1.rxdmamode = STM32_DMA_CR_CHSEL(SPI1_RX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI1_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_P2M |

                     STM32_DMA_CR_TCIE |

                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

-  SPID1.txdmamode = STM32_DMA_CR_CHSEL(SPI1_TX_DMA_CHANNEL) |

+  SPID1.txdmamode = STM32_DMA_CR_CHSEL(SPI1_TX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI1_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_M2P |

                     STM32_DMA_CR_DMEIE |

@@ -222,20 +217,15 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI2

   spiObjectInit(&SPID2);

   SPID2.spi       = SPI2;

-#if STM32_DMA_SUPPORTS_DMAMUX

-  SPID2.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI2_RX_DMA_CHANNEL);

-  SPID2.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI2_TX_DMA_CHANNEL);

-#else

-  SPID2.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI2_RX_DMA_STREAM);

-  SPID2.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI2_TX_DMA_STREAM);

-#endif

-  SPID2.rxdmamode = STM32_DMA_CR_CHSEL(SPI2_RX_DMA_CHANNEL) |

+  SPID2.dmarx     = NULL;

+  SPID2.dmatx     = NULL;

+  SPID2.rxdmamode = STM32_DMA_CR_CHSEL(SPI2_RX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI2_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_P2M |

                     STM32_DMA_CR_TCIE |

                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

-  SPID2.txdmamode = STM32_DMA_CR_CHSEL(SPI2_TX_DMA_CHANNEL) |

+  SPID2.txdmamode = STM32_DMA_CR_CHSEL(SPI2_TX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI2_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_M2P |

                     STM32_DMA_CR_DMEIE |

@@ -245,20 +235,15 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI3

   spiObjectInit(&SPID3);

   SPID3.spi       = SPI3;

-#if STM32_DMA_SUPPORTS_DMAMUX

-  SPID3.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI3_RX_DMA_CHANNEL);

-  SPID3.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI3_TX_DMA_CHANNEL);

-#else

-  SPID3.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI3_RX_DMA_STREAM);

-  SPID3.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI3_TX_DMA_STREAM);

-#endif

-  SPID3.rxdmamode = STM32_DMA_CR_CHSEL(SPI3_RX_DMA_CHANNEL) |

+  SPID3.dmarx     = NULL;

+  SPID3.dmatx     = NULL;

+  SPID3.rxdmamode = STM32_DMA_CR_CHSEL(SPI3_RX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI3_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_P2M |

                     STM32_DMA_CR_TCIE |

                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

-  SPID3.txdmamode = STM32_DMA_CR_CHSEL(SPI3_TX_DMA_CHANNEL) |

+  SPID3.txdmamode = STM32_DMA_CR_CHSEL(SPI3_TX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI3_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_M2P |

                     STM32_DMA_CR_DMEIE |

@@ -268,20 +253,15 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI4

   spiObjectInit(&SPID4);

   SPID4.spi       = SPI4;

-#if STM32_DMA_SUPPORTS_DMAMUX

-  SPID4.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI4_RX_DMA_CHANNEL);

-  SPID4.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI4_TX_DMA_CHANNEL);

-#else

-  SPID4.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI4_RX_DMA_STREAM);

-  SPID4.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI4_TX_DMA_STREAM);

-#endif

-  SPID4.rxdmamode = STM32_DMA_CR_CHSEL(SPI4_RX_DMA_CHANNEL) |

+  SPID4.dmarx     = NULL;

+  SPID4.dmatx     = NULL;

+  SPID4.rxdmamode = STM32_DMA_CR_CHSEL(SPI4_RX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI4_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_P2M |

                     STM32_DMA_CR_TCIE |

                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

-  SPID4.txdmamode = STM32_DMA_CR_CHSEL(SPI4_TX_DMA_CHANNEL) |

+  SPID4.txdmamode = STM32_DMA_CR_CHSEL(SPI4_TX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI4_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_M2P |

                     STM32_DMA_CR_DMEIE |

@@ -291,20 +271,15 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI5

   spiObjectInit(&SPID5);

   SPID5.spi       = SPI5;

-#if STM32_DMA_SUPPORTS_DMAMUX

-  SPID5.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI5_RX_DMA_CHANNEL);

-  SPID5.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI5_TX_DMA_CHANNEL);

-#else

-  SPID5.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI5_RX_DMA_STREAM);

-  SPID5.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI5_TX_DMA_STREAM);

-#endif

-  SPID5.rxdmamode = STM32_DMA_CR_CHSEL(SPI5_RX_DMA_CHANNEL) |

+  SPID5.dmarx     = NULL;

+  SPID5.dmatx     = NULL;

+  SPID5.rxdmamode = STM32_DMA_CR_CHSEL(SPI5_RX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI5_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_P2M |

                     STM32_DMA_CR_TCIE |

                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

-  SPID5.txdmamode = STM32_DMA_CR_CHSEL(SPI5_TX_DMA_CHANNEL) |

+  SPID5.txdmamode = STM32_DMA_CR_CHSEL(SPI5_TX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI5_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_M2P |

                     STM32_DMA_CR_DMEIE |

@@ -314,20 +289,15 @@ void spi_lld_init(void) {
 #if STM32_SPI_USE_SPI6

   spiObjectInit(&SPID6);

   SPID6.spi       = SPI6;

-#if STM32_DMA_SUPPORTS_DMAMUX

-  SPID6.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI6_RX_DMA_CHANNEL);

-  SPID6.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI6_TX_DMA_CHANNEL);

-#else

-  SPID6.dmarx     = STM32_DMA_STREAM(STM32_SPI_SPI6_RX_DMA_STREAM);

-  SPID6.dmatx     = STM32_DMA_STREAM(STM32_SPI_SPI6_TX_DMA_STREAM);

-#endif

-  SPID6.rxdmamode = STM32_DMA_CR_CHSEL(SPI6_RX_DMA_CHANNEL) |

+  SPID6.dmarx     = NULL;

+  SPID6.dmatx     = NULL;

+  SPID6.rxdmamode = STM32_DMA_CR_CHSEL(SPI6_RX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI6_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_P2M |

                     STM32_DMA_CR_TCIE |

                     STM32_DMA_CR_DMEIE |

                     STM32_DMA_CR_TEIE;

-  SPID6.txdmamode = STM32_DMA_CR_CHSEL(SPI6_TX_DMA_CHANNEL) |

+  SPID6.txdmamode = STM32_DMA_CR_CHSEL(SPI6_TX_DMA_STREAM) |

                     STM32_DMA_CR_PL(STM32_SPI_SPI6_DMA_PRIORITY) |

                     STM32_DMA_CR_DIR_M2P |

                     STM32_DMA_CR_DMEIE |

@@ -349,17 +319,16 @@ void spi_lld_start(SPIDriver *spip) {
   if (spip->state == SPI_STOP) {

 #if STM32_SPI_USE_SPI1

     if (&SPID1 == spip) {

-      bool b;

-      b = dmaStreamAllocate(spip->dmarx,

-                            STM32_SPI_SPI1_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(spip->dmatx,

-                            STM32_SPI_SPI1_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

+      spip->dmarx = dmaStreamAllocI(STM32_SPI_SPI1_RX_DMA_STREAM,

+                                    STM32_SPI_SPI1_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "unable to allocate stream");

+      spip->dmatx = dmaStreamAllocI(STM32_SPI_SPI1_TX_DMA_STREAM,

+                                    STM32_SPI_SPI1_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "unable to allocate stream");

       rccEnableSPI1(true);

 #if STM32_DMA_SUPPORTS_DMAMUX

       dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI1_RX);

@@ -369,17 +338,16 @@ void spi_lld_start(SPIDriver *spip) {
 #endif

 #if STM32_SPI_USE_SPI2

     if (&SPID2 == spip) {

-      bool b;

-      b = dmaStreamAllocate(spip->dmarx,

-                            STM32_SPI_SPI2_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(spip->dmatx,

-                            STM32_SPI_SPI2_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

+      spip->dmarx = dmaStreamAllocI(STM32_SPI_SPI2_RX_DMA_STREAM,

+                                    STM32_SPI_SPI2_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "unable to allocate stream");

+      spip->dmatx = dmaStreamAllocI(STM32_SPI_SPI2_TX_DMA_STREAM,

+                                    STM32_SPI_SPI2_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "unable to allocate stream");

       rccEnableSPI2(true);

 #if STM32_DMA_SUPPORTS_DMAMUX

       dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI2_RX);

@@ -389,17 +357,16 @@ void spi_lld_start(SPIDriver *spip) {
 #endif

 #if STM32_SPI_USE_SPI3

     if (&SPID3 == spip) {

-      bool b;

-      b = dmaStreamAllocate(spip->dmarx,

-                            STM32_SPI_SPI3_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(spip->dmatx,

-                            STM32_SPI_SPI3_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

+      spip->dmarx = dmaStreamAllocI(STM32_SPI_SPI3_RX_DMA_STREAM,

+                                    STM32_SPI_SPI3_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "unable to allocate stream");

+      spip->dmatx = dmaStreamAllocI(STM32_SPI_SPI3_TX_DMA_STREAM,

+                                    STM32_SPI_SPI3_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "unable to allocate stream");

       rccEnableSPI3(true);

 #if STM32_DMA_SUPPORTS_DMAMUX

       dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI3_RX);

@@ -409,17 +376,16 @@ void spi_lld_start(SPIDriver *spip) {
 #endif

 #if STM32_SPI_USE_SPI4

     if (&SPID4 == spip) {

-      bool b;

-      b = dmaStreamAllocate(spip->dmarx,

-                            STM32_SPI_SPI4_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(spip->dmatx,

-                            STM32_SPI_SPI4_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

+      spip->dmarx = dmaStreamAllocI(STM32_SPI_SPI4_RX_DMA_STREAM,

+                                    STM32_SPI_SPI4_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "unable to allocate stream");

+      spip->dmatx = dmaStreamAllocI(STM32_SPI_SPI4_TX_DMA_STREAM,

+                                    STM32_SPI_SPI4_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "unable to allocate stream");

       rccEnableSPI4(true);

 #if STM32_DMA_SUPPORTS_DMAMUX

       dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI4_RX);

@@ -429,17 +395,16 @@ void spi_lld_start(SPIDriver *spip) {
 #endif

 #if STM32_SPI_USE_SPI5

     if (&SPID5 == spip) {

-      bool b;

-      b = dmaStreamAllocate(spip->dmarx,

-                            STM32_SPI_SPI5_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(spip->dmatx,

-                            STM32_SPI_SPI5_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

+      spip->dmarx = dmaStreamAllocI(STM32_SPI_SPI5_RX_DMA_STREAM,

+                                    STM32_SPI_SPI5_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "unable to allocate stream");

+      spip->dmatx = dmaStreamAllocI(STM32_SPI_SPI5_TX_DMA_STREAM,

+                                    STM32_SPI_SPI5_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "unable to allocate stream");

       rccEnableSPI5(true);

 #if STM32_DMA_SUPPORTS_DMAMUX

       dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI5_RX);

@@ -449,17 +414,16 @@ void spi_lld_start(SPIDriver *spip) {
 #endif

 #if STM32_SPI_USE_SPI6

     if (&SPID6 == spip) {

-      bool b;

-      b = dmaStreamAllocate(spip->dmarx,

-                            STM32_SPI_SPI6_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

-      b = dmaStreamAllocate(spip->dmatx,

-                            STM32_SPI_SPI6_IRQ_PRIORITY,

-                            (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

-                            (void *)spip);

-      osalDbgAssert(!b, "stream already allocated");

+      spip->dmarx = dmaStreamAllocI(STM32_SPI_SPI6_RX_DMA_STREAM,

+                                    STM32_SPI_SPI6_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmarx != NULL, "unable to allocate stream");

+      spip->dmatx = dmaStreamAllocI(STM32_SPI_SPI6_TX_DMA_STREAM,

+                                    STM32_SPI_SPI6_IRQ_PRIORITY,

+                                    (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,

+                                    (void *)spip);

+      osalDbgAssert(spip->dmatx != NULL, "unable to allocate stream");

       rccEnableSPI6(true);

 #if STM32_DMA_SUPPORTS_DMAMUX

       dmaSetRequestSource(spip->dmarx, STM32_DMAMUX1_SPI6_RX);

@@ -523,8 +487,10 @@ void spi_lld_stop(SPIDriver *spip) {
     spip->spi->CR1 &= ~SPI_CR1_SPE;

     spip->spi->CR1  = 0;

     spip->spi->CR2  = 0;

-    dmaStreamRelease(spip->dmarx);

-    dmaStreamRelease(spip->dmatx);

+    dmaStreamFreeI(spip->dmarx);

+    dmaStreamFreeI(spip->dmatx);

+    spip->dmarx = NULL;

+    spip->dmatx = NULL;

 

 #if STM32_SPI_USE_SPI1

     if (&SPID1 == spip)

diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h
index 15f08f84a..3ded6ed2a 100644
--- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h
+++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h
@@ -301,132 +301,95 @@
 #error "Invalid DMA priority assigned to SPI6"

 #endif

 

-/* The following checks are only required when there is a DMA able to

-   reassign streams to different channels.*/

-#if STM32_ADVANCED_DMA

-

-/* Devices with DMAMUX require a different kind of check.*/

-#if STM32_DMA_SUPPORTS_DMAMUX

-

-/* Check on the presence of the DMA channel settings in mcuconf.h.*/

-#if STM32_SPI_USE_SPI1 && (!defined(STM32_SPI_SPI1_RX_DMA_CHANNEL) ||       \

-                           !defined(STM32_SPI_SPI1_TX_DMA_CHANNEL))

-#error "SPI1 DMA channels not defined"

+/* Check on the presence of the DMA streams settings in mcuconf.h.*/

+#if STM32_SPI_USE_SPI1 && (!defined(STM32_SPI_SPI1_RX_DMA_STREAM) ||        \

+                           !defined(STM32_SPI_SPI1_TX_DMA_STREAM))

+#error "SPI1 DMA streams not defined"

 #endif

 

-#if STM32_SPI_USE_SPI2 && (!defined(STM32_SPI_SPI2_RX_DMA_CHANNEL) ||       \

-                           !defined(STM32_SPI_SPI2_TX_DMA_CHANNEL))

+#if STM32_SPI_USE_SPI2 && (!defined(STM32_SPI_SPI2_RX_DMA_STREAM) ||        \

+                           !defined(STM32_SPI_SPI2_TX_DMA_STREAM))

 #error "SPI2 DMA streams not defined"

 #endif

 

-#if STM32_SPI_USE_SPI3 && (!defined(STM32_SPI_SPI3_RX_DMA_CHANNEL) ||       \

-                           !defined(STM32_SPI_SPI3_TX_DMA_CHANNEL))

+#if STM32_SPI_USE_SPI3 && (!defined(STM32_SPI_SPI3_RX_DMA_STREAM) ||        \

+                           !defined(STM32_SPI_SPI3_TX_DMA_STREAM))

 #error "SPI3 DMA streams not defined"

 #endif

 

-#if STM32_SPI_USE_SPI4 && (!defined(STM32_SPI_SPI4_RX_DMA_CHANNEL) ||       \

-                           !defined(STM32_SPI_SPI4_TX_DMA_CHANNEL))

+#if STM32_SPI_USE_SPI4 && (!defined(STM32_SPI_SPI4_RX_DMA_STREAM) ||        \

+                           !defined(STM32_SPI_SPI4_TX_DMA_STREAM))

 #error "SPI4 DMA streams not defined"

 #endif

 

-#if STM32_SPI_USE_SPI5 && (!defined(STM32_SPI_SPI5_RX_DMA_CHANNEL) ||       \

-                           !defined(STM32_SPI_SPI5_TX_DMA_CHANNEL))

+#if STM32_SPI_USE_SPI5 && (!defined(STM32_SPI_SPI5_RX_DMA_STREAM) ||        \

+                           !defined(STM32_SPI_SPI5_TX_DMA_STREAM))

 #error "SPI5 DMA streams not defined"

 #endif

 

-#if STM32_SPI_USE_SPI6 && (!defined(STM32_SPI_SPI6_RX_DMA_CHANNEL) ||       \

-                           !defined(STM32_SPI_SPI6_TX_DMA_CHANNEL))

+#if STM32_SPI_USE_SPI6 && (!defined(STM32_SPI_SPI6_RX_DMA_STREAM) ||        \

+                           !defined(STM32_SPI_SPI6_TX_DMA_STREAM))

 #error "SPI6 DMA streams not defined"

 #endif

 

 /* Check on the validity of the assigned DMA channels.*/

 #if STM32_SPI_USE_SPI1 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI1_TX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI1_TX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI1 TX"

 #endif

 

 #if STM32_SPI_USE_SPI2 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI2_RX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI2_RX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI2 RX"

 #endif

 

 #if STM32_SPI_USE_SPI2 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI2_TX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI2_TX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI2 TX"

 #endif

 

 #if STM32_SPI_USE_SPI3 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI3_RX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI3_RX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI3 RX"

 #endif

 

 #if STM32_SPI_USE_SPI3 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI3_TX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI3_TX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI3 TX"

 #endif

 

 #if STM32_SPI_USE_SPI4 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI4_RX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI4_RX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI4 RX"

 #endif

 

 #if STM32_SPI_USE_SPI4 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI4_TX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI4_TX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI4 TX"

 #endif

 

 #if STM32_SPI_USE_SPI5 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI5_RX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI5_RX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI5 RX"

 #endif

 

 #if STM32_SPI_USE_SPI5 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI5_TX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI5_TX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI5 TX"

 #endif

 

 #if STM32_SPI_USE_SPI6 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI6_RX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI6_RX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI6 RX"

 #endif

 

 #if STM32_SPI_USE_SPI6 &&                                                   \

-    !STM32_DMA_IS_VALID_CHANNEL(STM32_SPI_SPI6_TX_DMA_CHANNEL)

+    !STM32_DMA_IS_VALID_STREAM(STM32_SPI_SPI6_TX_DMA_STREAM)

 #error "Invalid DMA channel assigned to SPI6 TX"

 #endif

 

-#else /* !STM32_DMA_SUPPORTS_DMAMUX */

-

-/* Check on the presence of the DMA streams settings in mcuconf.h.*/

-#if STM32_SPI_USE_SPI1 && (!defined(STM32_SPI_SPI1_RX_DMA_STREAM) ||        \

-                           !defined(STM32_SPI_SPI1_TX_DMA_STREAM))

-#error "SPI1 DMA streams not defined"

-#endif

-

-#if STM32_SPI_USE_SPI2 && (!defined(STM32_SPI_SPI2_RX_DMA_STREAM) ||        \

-                           !defined(STM32_SPI_SPI2_TX_DMA_STREAM))

-#error "SPI2 DMA streams not defined"

-#endif

-

-#if STM32_SPI_USE_SPI3 && (!defined(STM32_SPI_SPI3_RX_DMA_STREAM) ||        \

-                           !defined(STM32_SPI_SPI3_TX_DMA_STREAM))

-#error "SPI3 DMA streams not defined"

-#endif

-

-#if STM32_SPI_USE_SPI4 && (!defined(STM32_SPI_SPI4_RX_DMA_STREAM) ||        \

-                           !defined(STM32_SPI_SPI4_TX_DMA_STREAM))

-#error "SPI4 DMA streams not defined"

-#endif

-

-#if STM32_SPI_USE_SPI5 && (!defined(STM32_SPI_SPI5_RX_DMA_STREAM) ||        \

-                           !defined(STM32_SPI_SPI5_TX_DMA_STREAM))

-#error "SPI5 DMA streams not defined"

-#endif

-

-#if STM32_SPI_USE_SPI6 && (!defined(STM32_SPI_SPI6_RX_DMA_STREAM) ||        \

-                           !defined(STM32_SPI_SPI6_TX_DMA_STREAM))

-#error "SPI6 DMA streams not defined"

-#endif

+/* Devices without DMAMUX require an additional check.*/

+#if STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX

 

 /* Check on the validity of the assigned DMA channels.*/

 #if STM32_SPI_USE_SPI1 &&                                                   \

@@ -489,9 +452,7 @@
 #error "invalid DMA stream associated to SPI6 TX"

 #endif

 

-#endif /* !STM32_DMA_SUPPORTS_DMAMUX */

-

-#endif /* STM32_ADVANCED_DMA */

+#endif /* STM32_ADVANCED_DMA && !STM32_DMA_SUPPORTS_DMAMUX */

 

 #if !defined(STM32_DMA_REQUIRED)

 #define STM32_DMA_REQUIRED