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authorgdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01>2018-11-25 15:12:23 +0000
committergdisirio <gdisirio@110e8d01-0319-4d1e-a829-52ad28d1bb01>2018-11-25 15:12:23 +0000
commitf24c09b778d1103a345cb94b2d57c3e76fb5a681 (patch)
tree7cb8e38c56074a7ecb3a7c19adbf11e63da819d2 /os/hal/ports/STM32/LLD/RTCv2
parent6268914b7c6eac2a8ee04b2f9d4c270fc5363dee (diff)
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RTC changes for F3.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12440 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports/STM32/LLD/RTCv2')
-rw-r--r--os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c29
-rw-r--r--os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h2
2 files changed, 25 insertions, 6 deletions
diff --git a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
index 2dfc4f62c..66bde797a 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
+++ b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
@@ -384,7 +384,7 @@ OSAL_IRQ_HANDLER(STM32_RTC_TAMP_STAMP_HANDLER) {
extiClearGroup1(EXTI_MASK1(STM32_RTC_TAMP_STAMP_EXTI));
if (RTCD1.callback != NULL) {
- uint32_t cr, tampcr;
+ uint32_t cr, tcr;
cr = RTCD1.rtc->CR;
if ((cr & RTC_CR_TSIE) != 0U) {
@@ -396,25 +396,44 @@ OSAL_IRQ_HANDLER(STM32_RTC_TAMP_STAMP_HANDLER) {
}
}
- tampcr = RTCD1.rtc->TAMPCR;
+ /* This part is different depending on if the RTC has a TAMPCR or TAFCR
+ register.*/
+#if defined(RTC_TAFCR_TAMP1E)
+ tcr = RTCD1.rtc->TAFCR;
+ if ((tcr & RTC_TAFCR_TAMPIE) != 0U) {
+#if defined(RTC_ISR_TAMP1F)
+ if ((isr & RTC_ISR_TAMP1F) != 0U) {
+ RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);
+ }
+#endif
+#if defined(RTC_ISR_TAMP2F)
+ if ((isr & RTC_ISR_TAMP2F) != 0U) {
+ RTCD1.callback(&RTCD1, RTC_EVENT_TAMP2);
+ }
+#endif
+ }
+
+#else /* !defined(RTC_TAFCR_TAMP1E) */
+ tcr = RTCD1.rtc->TAMPCR;
#if defined(RTC_ISR_TAMP1F)
- if (((tampcr & RTC_TAMPCR_TAMP1IE) != 0U) &&
+ if (((tcr & RTC_TAMPCR_TAMP1IE) != 0U) &&
((isr & RTC_ISR_TAMP1F) != 0U)) {
RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);
}
#endif
#if defined(RTC_ISR_TAMP2F)
- if (((tampcr & RTC_TAMPCR_TAMP2IE) != 0U) &&
+ if (((tcr & RTC_TAMPCR_TAMP2IE) != 0U) &&
((isr & RTC_ISR_TAMP2F) != 0U)) {
RTCD1.callback(&RTCD1, RTC_EVENT_TAMP2);
}
#endif
#if defined(RTC_ISR_TAMP3F)
- if (((tampcr & RTC_TAMPCR_TAMP3IE) != 0U) &&
+ if (((tcr & RTC_TAMPCR_TAMP3IE) != 0U) &&
((isr & RTC_ISR_TAMP3F) != 0U)) {
RTCD1.callback(&RTCD1, RTC_EVENT_TAMP3);
}
#endif
+#endif /* !defined(RTC_TAFCR_TAMP1E) */
}
OSAL_IRQ_EPILOGUE();
diff --git a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
index e538a6480..cab56c94b 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
+++ b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
@@ -120,7 +120,7 @@
* @brief RTC TAMPCR register initialization value.
* @note Use this value to initialize features not directly handled by
* the RTC driver.
- * @note On F0 devices this values goes in the similar TAFCR register.
+ * @note On some devices this values goes in the similar TAFCR register.
*/
#if !defined(STM32_RTC_TAMPCR_INIT) || defined(__DOXYGEN__)
#define STM32_RTC_TAMPCR_INIT 0