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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-04-30 14:27:22 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-04-30 14:27:22 +0000 |
| commit | 42b31676df924a74c98c1d7780ebff3dd68d5086 (patch) | |
| tree | 95d93bbae0be004661e6a7c0953f3079a0929b9b /os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | |
| parent | d54439d5fa2efea7a792b9df8eb90550c8411480 (diff) | |
| download | ChibiOS-42b31676df924a74c98c1d7780ebff3dd68d5086.tar.gz ChibiOS-42b31676df924a74c98c1d7780ebff3dd68d5086.tar.bz2 ChibiOS-42b31676df924a74c98c1d7780ebff3dd68d5086.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6900 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c')
| -rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c index 1fdcd8dbb..2ded0a6ef 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c @@ -30,7 +30,7 @@ /* Driver local definitions. */
/*===========================================================================*/
-#if defined(STM32L1XX_MD) || defined(STM32L1XX_MDP) || defined(STM32L1XX_HD)
+#if defined(STM32L1XX)
#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \
RCC_AHBENR_GPIOEEN | RCC_AHBENR_GPIOHEN)
@@ -51,8 +51,8 @@ RCC_AHB1ENR_GPIOEEN | RCC_AHB1ENR_GPIOFEN | \
RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIOHEN | \
RCC_AHB1ENR_GPIOIEN)
-
#define AHB1_LPEN_MASK AHB1_EN_MASK
+
#elif defined(STM32F30X) || defined(STM32F37X)
#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \
@@ -114,7 +114,7 @@ void _pal_lld_init(const PALConfig *config) { /*
* Enables the GPIO related clocks.
*/
-#if defined(STM32L1XX_MD) || defined(STM32L1XX_MDP) || defined(STM32L1XX_HD)
+#if defined(STM32L1XX)
rccEnableAHB(AHB_EN_MASK, TRUE);
RCC->AHBLPENR |= AHB_LPEN_MASK;
#elif defined(STM32F0XX)
|