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authorGiovanni Di Sirio <gdisirio@gmail.com>2016-04-02 08:31:39 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2016-04-02 08:31:39 +0000
commita84c32523cb971505e03ae73409839637d8706a9 (patch)
tree0fbdac64cba70108c3a6106e137cef741e1901ba /os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h
parentf905d498c81714e5c846529a441ef6977908d39f (diff)
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STM32 LLD renaming done.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9208 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h')
-rw-r--r--os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h376
1 files changed, 0 insertions, 376 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h
deleted file mode 100644
index 348a55f2e..000000000
--- a/os/hal/ports/STM32/LLD/GPIOv1/pal_lld.h
+++ /dev/null
@@ -1,376 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file STM32/GPIOv1/pal_lld.h
- * @brief STM32 PAL low level driver header.
- *
- * @addtogroup PAL
- * @{
- */
-
-#ifndef _PAL_LLD_H_
-#define _PAL_LLD_H_
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Unsupported modes and specific modes */
-/*===========================================================================*/
-
-/**
- * @name STM32-specific I/O mode flags
- * @{
- */
-/**
- * @brief STM32 specific alternate push-pull output mode.
- */
-#define PAL_MODE_STM32_ALTERNATE_PUSHPULL 16
-
-/**
- * @brief STM32 specific alternate open-drain output mode.
- */
-#define PAL_MODE_STM32_ALTERNATE_OPENDRAIN 17
-/** @} */
-
-/*===========================================================================*/
-/* I/O Ports Types and constants. */
-/*===========================================================================*/
-
-/**
- * @name Port related definitions
- * @{
- */
-/**
- * @brief Width, in bits, of an I/O port.
- */
-#define PAL_IOPORTS_WIDTH 16
-
-/**
- * @brief Whole port mask.
- * @details This macro specifies all the valid bits into a port.
- */
-#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFF)
-/** @} */
-
-/**
- * @name Line handling macros
- * @{
- */
-/**
- * @brief Forms a line identifier.
- * @details A port/pad pair are encoded into an @p ioline_t type. The encoding
- * of this type is platform-dependent.
- * @note In this driver the pad number is encoded in the lower 4 bits of
- * the GPIO address which are guaranteed to be zero.
- */
-#define PAL_LINE(port, pad) \
- ((ioline_t)((uint32_t)(port)) | ((uint32_t)(pad)))
-
-/**
- * @brief Decodes a port identifier from a line identifier.
- */
-#define PAL_PORT(line) \
- ((stm32_gpio_t *)(((uint32_t)(line)) & 0xFFFFFFF0U))
-
-/**
- * @brief Decodes a pad identifier from a line identifier.
- */
-#define PAL_PAD(line) \
- ((uint32_t)((uint32_t)(line) & 0x0000000FU))
-
-/**
- * @brief Value identifying an invalid line.
- */
-#define PAL_NOLINE 0U
-/** @} */
-
-/**
- * @brief GPIO port setup info.
- */
-typedef struct {
- /** Initial value for ODR register.*/
- uint32_t odr;
- /** Initial value for CRL register.*/
- uint32_t crl;
- /** Initial value for CRH register.*/
- uint32_t crh;
-} stm32_gpio_setup_t;
-
-/**
- * @brief STM32 GPIO static initializer.
- * @details An instance of this structure must be passed to @p palInit() at
- * system startup time in order to initialize the digital I/O
- * subsystem. This represents only the initial setup, specific pads
- * or whole ports can be reprogrammed at later time.
- */
-typedef struct {
- /** @brief Port A setup data.*/
- stm32_gpio_setup_t PAData;
- /** @brief Port B setup data.*/
- stm32_gpio_setup_t PBData;
- /** @brief Port C setup data.*/
- stm32_gpio_setup_t PCData;
- /** @brief Port D setup data.*/
- stm32_gpio_setup_t PDData;
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
- /** @brief Port E setup data.*/
- stm32_gpio_setup_t PEData;
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
- /** @brief Port F setup data.*/
- stm32_gpio_setup_t PFData;
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
- /** @brief Port G setup data.*/
- stm32_gpio_setup_t PGData;
-#endif
-#endif
-#endif
-} PALConfig;
-
-/**
- * @brief Digital I/O port sized unsigned type.
- */
-typedef uint32_t ioportmask_t;
-
-/**
- * @brief Digital I/O modes.
- */
-typedef uint32_t iomode_t;
-
-/**
- * @brief Type of an I/O line.
- */
-typedef uint32_t ioline_t;
-
-/**
- * @brief Port Identifier.
- * @details This type can be a scalar or some kind of pointer, do not make
- * any assumption about it, use the provided macros when populating
- * variables of this type.
- */
-typedef GPIO_TypeDef * ioportid_t;
-
-/*===========================================================================*/
-/* I/O Ports Identifiers. */
-/* The low level driver wraps the definitions already present in the STM32 */
-/* firmware library. */
-/*===========================================================================*/
-
-/**
- * @brief GPIO port A identifier.
- */
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
-#define IOPORT1 GPIOA
-#endif
-
-/**
- * @brief GPIO port B identifier.
- */
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
-#define IOPORT2 GPIOB
-#endif
-
-/**
- * @brief GPIO port C identifier.
- */
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
-#define IOPORT3 GPIOC
-#endif
-
-/**
- * @brief GPIO port D identifier.
- */
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
-#define IOPORT4 GPIOD
-#endif
-
-/**
- * @brief GPIO port E identifier.
- */
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
-#define IOPORT5 GPIOE
-#endif
-
-/**
- * @brief GPIO port F identifier.
- */
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
-#define IOPORT6 GPIOF
-#endif
-
-/**
- * @brief GPIO port G identifier.
- */
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
-#define IOPORT7 GPIOG
-#endif
-
-/*===========================================================================*/
-/* Implementation, some of the following macros could be implemented as */
-/* functions, if so please put them in pal_lld.c. */
-/*===========================================================================*/
-
-/**
- * @brief GPIO ports subsystem initialization.
- *
- * @notapi
- */
-#define pal_lld_init(config) _pal_lld_init(config)
-
-/**
- * @brief Reads an I/O port.
- * @details This function is implemented by reading the GPIO IDR register, the
- * implementation has no side effects.
- * @note This function is not meant to be invoked directly by the application
- * code.
- *
- * @param[in] port port identifier
- * @return The port bits.
- *
- * @notapi
- */
-#define pal_lld_readport(port) ((port)->IDR)
-
-/**
- * @brief Reads the output latch.
- * @details This function is implemented by reading the GPIO ODR register, the
- * implementation has no side effects.
- * @note This function is not meant to be invoked directly by the application
- * code.
- *
- * @param[in] port port identifier
- * @return The latched logical states.
- *
- * @notapi
- */
-#define pal_lld_readlatch(port) ((port)->ODR)
-
-/**
- * @brief Writes on a I/O port.
- * @details This function is implemented by writing the GPIO ODR register, the
- * implementation has no side effects.
- * @note Writing on pads programmed as pull-up or pull-down has the side
- * effect to modify the resistor setting because the output latched
- * data is used for the resistor selection.
- *
- * @param[in] port port identifier
- * @param[in] bits bits to be written on the specified port
- *
- * @notapi
- */
-#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
-
-/**
- * @brief Sets a bits mask on a I/O port.
- * @details This function is implemented by writing the GPIO BSRR register, the
- * implementation has no side effects.
- * @note Writing on pads programmed as pull-up or pull-down has the side
- * effect to modify the resistor setting because the output latched
- * data is used for the resistor selection.
- *
- * @param[in] port port identifier
- * @param[in] bits bits to be ORed on the specified port
- *
- * @notapi
- */
-#define pal_lld_setport(port, bits) ((port)->BSRR = (bits))
-
-/**
- * @brief Clears a bits mask on a I/O port.
- * @details This function is implemented by writing the GPIO BRR register, the
- * implementation has no side effects.
- * @note Writing on pads programmed as pull-up or pull-down has the side
- * effect to modify the resistor setting because the output latched
- * data is used for the resistor selection.
- *
- * @param[in] port port identifier
- * @param[in] bits bits to be cleared on the specified port
- *
- * @notapi
- */
-#define pal_lld_clearport(port, bits) ((port)->BRR = (bits))
-
-/**
- * @brief Writes a group of bits.
- * @details This function is implemented by writing the GPIO BSRR register, the
- * implementation has no side effects.
- * @note Writing on pads programmed as pull-up or pull-down has the side
- * effect to modify the resistor setting because the output latched
- * data is used for the resistor selection.
- *
- * @param[in] port port identifier
- * @param[in] mask group mask
- * @param[in] offset the group bit offset within the port
- * @param[in] bits bits to be written. Values exceeding the group
- * width are masked.
- *
- * @notapi
- */
-#define pal_lld_writegroup(port, mask, offset, bits) \
- ((port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
- (((bits) & (mask)) << (offset)))
-
-/**
- * @brief Pads group mode setup.
- * @details This function programs a pads group belonging to the same port
- * with the specified mode.
- * @note Writing on pads programmed as pull-up or pull-down has the side
- * effect to modify the resistor setting because the output latched
- * data is used for the resistor selection.
- *
- * @param[in] port port identifier
- * @param[in] mask group mask
- * @param[in] offset group bit offset within the port
- * @param[in] mode group mode
- *
- * @notapi
- */
-#define pal_lld_setgroupmode(port, mask, offset, mode) \
- _pal_lld_setgroupmode(port, mask << offset, mode)
-
-/**
- * @brief Writes a logical state on an output pad.
- * @note Writing on pads programmed as pull-up or pull-down has the side
- * effect to modify the resistor setting because the output latched
- * data is used for the resistor selection.
- *
- * @param[in] port port identifier
- * @param[in] pad pad number within the port
- * @param[in] bit logical value, the value must be @p PAL_LOW or
- * @p PAL_HIGH
- *
- * @notapi
- */
-#define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)
-
-extern const PALConfig pal_default_config;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _pal_lld_init(const PALConfig *config);
- void _pal_lld_setgroupmode(ioportid_t port,
- ioportmask_t mask,
- iomode_t mode);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* HAL_USE_PAL */
-
-#endif /* _PAL_LLD_H_ */
-
-/** @} */