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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-08 08:58:34 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-08 08:58:34 +0000 |
| commit | 7761387ba0a0ac206b7e5ab133462c29882b63bd (patch) | |
| tree | 158722e03054fb8b5727ff27dc5aae28eef13ce8 /os/hal/ports/STM32/LLD/DMAv2 | |
| parent | 4148fb3cb7dcbe3eeef998bf6d0a86a1ad2447da (diff) | |
| download | ChibiOS-7761387ba0a0ac206b7e5ab133462c29882b63bd.tar.gz ChibiOS-7761387ba0a0ac206b7e5ab133462c29882b63bd.tar.bz2 ChibiOS-7761387ba0a0ac206b7e5ab133462c29882b63bd.zip | |
Added unified cache handler for Cortex-M devices.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11233 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/LLD/DMAv2')
| -rw-r--r-- | os/hal/ports/STM32/LLD/DMAv2/notes.txt | 2 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h | 71 |
2 files changed, 2 insertions, 71 deletions
diff --git a/os/hal/ports/STM32/LLD/DMAv2/notes.txt b/os/hal/ports/STM32/LLD/DMAv2/notes.txt index a4e14d38d..4c01d8309 100644 --- a/os/hal/ports/STM32/LLD/DMAv2/notes.txt +++ b/os/hal/ports/STM32/LLD/DMAv2/notes.txt @@ -16,5 +16,3 @@ STM32_ADVANCED_DMA - TRUE not used by the DMA drivers but other STM32_HAS_DMAx - Support for DMA unit "x" (1..2).
STM32_DMAx_CHn_HANDLER - Vector name for channel "n" (0..7).
STM32_DMAn_CHx_NUMBER - Vector number for channel "n" (0..7).
-STM32_DMA_CACHE_HANDLING - TRUE if the device requires explicit cache
- handling on DMA buffers.
\ No newline at end of file diff --git a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h index 4e714ad49..112af2e80 100644 --- a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h +++ b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h @@ -25,6 +25,8 @@ #ifndef STM32_DMA_H
#define STM32_DMA_H
+#include "cache.h"
+
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
@@ -216,10 +218,6 @@ /* Derived constants and error checks. */
/*===========================================================================*/
-#if !defined(STM32_DMA_CACHE_HANDLING)
-#error "STM32_DMA_CACHE_HANDLING missing in registry"
-#endif
-
#if !defined(STM32_HAS_DMA1)
#error "STM32_HAS_DMA1 missing in registry"
#endif
@@ -385,71 +383,6 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); /* Driver macros. */
/*===========================================================================*/
-#if STM32_DMA_CACHE_HANDLING || defined(__DOXYGEN__)
-/**
- * @brief Invalidates the data cache lines overlapping a DMA buffer.
- * @details This function is meant to make sure that data written in
- * data cache is invalidated. It is used for DMA buffers that
- * must have been written by a DMA stream.
- * @note On devices without data cache this function does nothing.
- * @note The function does not consider the lower 5 bits of addresses,
- * the buffers are meant to be aligned to a 32 bytes boundary or
- * adjacent data can be invalidated as side effect.
- *
- * @param[in] saddr start address of the DMA buffer
- * @param[in] n size of the DMA buffer in bytes
- *
- * @api
- */
-#define dmaBufferInvalidate(saddr, n) { \
- uint8_t *start = (uint8_t *)(saddr); \
- uint8_t *end = start + (size_t)(n); \
- __DSB(); \
- while (start < end) { \
- SCB->DCIMVAC = (uint32_t)start; \
- start += 32U; \
- } \
- __DSB(); \
- __ISB(); \
-}
-
-/**
- * @brief Flushes the data cache lines overlapping a DMA buffer.
- * @details This function is meant to make sure that data written in
- * data cache is flushed to RAM. It is used for DMA buffers that
- * must be read by a DMA stream.
- * @note On devices without data cache this function does nothing.
- * @note The function does not consider the lower 5 bits of addresses,
- * the buffers are meant to be aligned to a 32 bytes boundary or
- * adjacent data can be flushed as side effect.
- *
- * @param[in] saddr start address of the DMA buffer
- * @param[in] n size of the DMA buffer in bytes
- *
- * @api
- */
-#define dmaBufferFlush(saddr, n) { \
- uint8_t *start = (uint8_t *)(saddr); \
- uint8_t *end = start + (size_t)(n); \
- __DSB(); \
- while (start < end) { \
- SCB->DCCIMVAC = (uint32_t)start; \
- start += 32U; \
- } \
- __DSB(); \
- __ISB(); \
-}
-#else
-#define dmaBufferInvalidate(addr, size) { \
- (void)(addr); \
- (void)(size); \
-}
-#define dmaBufferFlush(addr, size) { \
- (void)(addr); \
- (void)(size); \
-}
-#endif
-
/**
* @name Macro Functions
* @{
|