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| author | utzig <utzig@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-26 13:26:47 +0000 |
|---|---|---|
| committer | utzig <utzig@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-07-26 13:26:47 +0000 |
| commit | 1437e590d75a23b57a5d613bf037bb1f07d082d5 (patch) | |
| tree | d5e0b42fea7b35f3a929a81484784c6e1dae44ec /os/hal/ports/AVR/hal_lld.c | |
| parent | df18715f17db9273f45f880d7ba390b983eb8869 (diff) | |
| download | ChibiOS-1437e590d75a23b57a5d613bf037bb1f07d082d5.tar.gz ChibiOS-1437e590d75a23b57a5d613bf037bb1f07d082d5.tar.bz2 ChibiOS-1437e590d75a23b57a5d613bf037bb1f07d082d5.zip | |
[AVR] Add preliminary tickless support to HAL
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7101 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/AVR/hal_lld.c')
| -rw-r--r-- | os/hal/ports/AVR/hal_lld.c | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/os/hal/ports/AVR/hal_lld.c b/os/hal/ports/AVR/hal_lld.c index 894d5dcc5..c3b90dd6b 100644 --- a/os/hal/ports/AVR/hal_lld.c +++ b/os/hal/ports/AVR/hal_lld.c @@ -40,21 +40,6 @@ /* Driver interrupt handlers. */
/*===========================================================================*/
-/**
- * @brief Timer0 interrupt handler.
- */
-OSAL_IRQ_HANDLER(AVR_TIMER_VECT) {
-
- OSAL_IRQ_PROLOGUE();
-
- osalSysLockFromISR();
- osalOsTimerHandlerI();
- osalSysUnlockFromISR();
-
- OSAL_IRQ_EPILOGUE();
-}
-
-
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -65,39 +50,6 @@ OSAL_IRQ_HANDLER(AVR_TIMER_VECT) { * @notapi
*/
void hal_lld_init(void) {
-
- /*
- * Timer 0 setup.
- */
-#if defined(TCCR0B) /* Timer has multiple output comparators */
- TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
- (0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
- (0 << COM0B1) | (0 << COM0B0); /* OC0B disabled. */
- TCCR0B = (0 << WGM02) | AVR_TIMER_PRESCALER_BITS; /* CTC mode. */
- OCR0A = AVR_TIMER_COUNTER - 1;
- TCNT0 = 0; /* Reset counter. */
- TIFR0 = (1 << OCF0A); /* Reset pending. */
- TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
-
-#elif defined(TCCR0A) /* AT90CAN doesn't have TCCR0B and slightly different TCCR0A */
- TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
- (0 << COM0A1) | (0 << COM0A0); /* OC0A disabled. */
- OCR0A = AVR_TIMER_COUNTER - 1;
- TCNT0 = 0; /* Reset counter. */
- TIFR0 = (1 << OCF0A); /* Reset pending. */
- TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
-
-#elif defined(TCCR0) /* Timer has single output comparator */
- TCCR0 = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
- (0 << COM01) | (0 << COM00) | /* OC0A disabled. */
- AVR_TIMER_PRESCALER_BITS;
- OCR0 = AVR_TIMER_COUNTER - 1;
- TCNT0 = 0; /* Reset counter. */
- TIFR = (1 << OCF0); /* Reset pending. */
- TIMSK = (1 << OCIE0); /* IRQ on compare. */
-#else
- #error "Neither TCCR0A nor TCCR0 registers are defined"
-#endif
}
/** @} */
|